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Commit 3cfce8b8 authored by Skylar Chang's avatar Skylar Chang
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ARM: dts: msm: enable IPA SMMU S1 for msmnile 



Enable SMMU stage 1 translation for IPA embedded CB.
This change enable IO Coherency as well.

CRs-Fixed:2217891
Change-Id: If2b1f9ce3fabc9c7534c7ff8dafddd41d2983dd3
Signed-off-by: default avatarSkylar Chang <chiaweic@codeaurora.org>
parent 5f228f0a
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