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Commit 369602d3 authored by Gaurav K Singh's avatar Gaurav K Singh Committed by Daniel Vetter
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drm/i915: Add support for port enable/disable for dual link configuration 



For Dual Link MIPI Panels, both Port A and Port C should be enabled
during the MIPI encoder enabling sequence. Similarly, during the
disabling sequence, both ports needs to be disabled.

v2: Used for_each_dsi_port macro instead of for loop

v3: Used intel_dsi->ports instead of dual_link var for dual link configuration check

v4: Masking of the required MIPI port bits before writing proper values

Signed-off-by: default avatarGaurav K Singh <gaurav.k.singh@intel.com>
Signed-off-by: default avatarShobhit Kumar <shobhit.kumar@intel.com>
Reviewed-by: default avatarJani Nikula <jani.nikula@intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 8edfbb8b

drivers/gpu/drm/i915/i915_reg.h

+1 −0
Original line number Original line Diff line number Diff line
@@ -6665,6 +6665,7 @@ enum punit_power_well { 
#define  DPI_ENABLE					(1 << 31) /* A + C */

#define  DPI_ENABLE					(1 << 31) /* A + C */

#define  MIPIA_MIPI4DPHY_DELAY_COUNT_SHIFT		27

#define  MIPIA_MIPI4DPHY_DELAY_COUNT_SHIFT		27

#define  MIPIA_MIPI4DPHY_DELAY_COUNT_MASK		(0xf << 27)

#define  MIPIA_MIPI4DPHY_DELAY_COUNT_MASK		(0xf << 27)

#define  DUAL_LINK_MODE_SHIFT				26

#define  DUAL_LINK_MODE_MASK				(1 << 26)

#define  DUAL_LINK_MODE_MASK				(1 << 26)

#define  DUAL_LINK_MODE_FRONT_BACK			(0 << 26)

#define  DUAL_LINK_MODE_FRONT_BACK			(0 << 26)

#define  DUAL_LINK_MODE_PIXEL_ALTERNATIVE		(1 << 26)

#define  DUAL_LINK_MODE_PIXEL_ALTERNATIVE		(1 << 26)

drivers/gpu/drm/i915/intel_dsi.c

+25 −12
Original line number Original line Diff line number Diff line
@@ -108,29 +108,42 @@ static void intel_dsi_port_enable(struct intel_encoder *encoder) 
	struct drm_i915_private *dev_priv = dev->dev_private;

	struct drm_i915_private *dev_priv = dev->dev_private;

	struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);

	struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);

	struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);

	struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);

	enum port port = intel_dsi_pipe_to_port(intel_crtc->pipe);

	enum port port;

	u32 temp;

	u32 temp;





	for_each_dsi_port(port, intel_dsi->ports) {

		temp = I915_READ(MIPI_PORT_CTRL(port));

		temp &= ~LANE_CONFIGURATION_MASK;

		temp &= ~DUAL_LINK_MODE_MASK;



		if (intel_dsi->ports == ((1 << PORT_A) | (1 << PORT_C))) {

			temp |= (intel_dsi->dual_link - 1)

						<< DUAL_LINK_MODE_SHIFT;

			temp |= intel_crtc->pipe ?

					LANE_CONFIGURATION_DUAL_LINK_B :

					LANE_CONFIGURATION_DUAL_LINK_A;

		}

		/* assert ip_tg_enable signal */

		/* assert ip_tg_enable signal */

	temp = I915_READ(MIPI_PORT_CTRL(port)) & ~LANE_CONFIGURATION_MASK;

	temp = temp | intel_dsi->port_bits;

		I915_WRITE(MIPI_PORT_CTRL(port), temp | DPI_ENABLE);

		I915_WRITE(MIPI_PORT_CTRL(port), temp | DPI_ENABLE);

		POSTING_READ(MIPI_PORT_CTRL(port));

		POSTING_READ(MIPI_PORT_CTRL(port));

	}

	}

}





static void intel_dsi_port_disable(struct intel_encoder *encoder)

static void intel_dsi_port_disable(struct intel_encoder *encoder)

{

{

	struct drm_device *dev = encoder->base.dev;

	struct drm_device *dev = encoder->base.dev;

	struct drm_i915_private *dev_priv = dev->dev_private;

	struct drm_i915_private *dev_priv = dev->dev_private;

	struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);

	struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);

	enum port port = intel_dsi_pipe_to_port(intel_crtc->pipe);

	enum port port;

	u32 temp;

	u32 temp;





	for_each_dsi_port(port, intel_dsi->ports) {

		/* de-assert ip_tg_enable signal */

		/* de-assert ip_tg_enable signal */

		temp = I915_READ(MIPI_PORT_CTRL(port));

		temp = I915_READ(MIPI_PORT_CTRL(port));

		I915_WRITE(MIPI_PORT_CTRL(port), temp & ~DPI_ENABLE);

		I915_WRITE(MIPI_PORT_CTRL(port), temp & ~DPI_ENABLE);

		POSTING_READ(MIPI_PORT_CTRL(port));

		POSTING_READ(MIPI_PORT_CTRL(port));

	}

	}

}





static void intel_dsi_device_ready(struct intel_encoder *encoder)

static void intel_dsi_device_ready(struct intel_encoder *encoder)

{

{

drivers/gpu/drm/i915/intel_dsi.h

+1 −0
Original line number Original line Diff line number Diff line
@@ -104,6 +104,7 @@ struct intel_dsi { 
	u8 clock_stop;

	u8 clock_stop;





	u8 escape_clk_div;

	u8 escape_clk_div;

	u8 dual_link;

	u32 port_bits;

	u32 port_bits;

	u32 bw_timer;

	u32 bw_timer;

	u32 dphy_reg;

	u32 dphy_reg;

drivers/gpu/drm/i915/intel_dsi_panel_vbt.c

+4 −0
Original line number Original line Diff line number Diff line
@@ -287,6 +287,10 @@ static bool generic_init(struct intel_dsi_device *dsi) 
	intel_dsi->clock_stop = mipi_config->enable_clk_stop ? 1 : 0;

	intel_dsi->clock_stop = mipi_config->enable_clk_stop ? 1 : 0;

	intel_dsi->lane_count = mipi_config->lane_cnt + 1;

	intel_dsi->lane_count = mipi_config->lane_cnt + 1;

	intel_dsi->pixel_format = mipi_config->videomode_color_format << 7;

	intel_dsi->pixel_format = mipi_config->videomode_color_format << 7;

	intel_dsi->dual_link = mipi_config->dual_link;



	if (intel_dsi->dual_link)

		intel_dsi->ports = ((1 << PORT_A) | (1 << PORT_C));





	if (intel_dsi->pixel_format == VID_MODE_FORMAT_RGB666)

	if (intel_dsi->pixel_format == VID_MODE_FORMAT_RGB666)

		bits_per_pixel = 18;

		bits_per_pixel = 18;