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Commit 34ed780a authored by Larry Finger's avatar Larry Finger Committed by John W. Linville
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rtlwifi: Fix problems with building an allyesconfig

parent 21e4b072
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+98 −0
Original line number Diff line number Diff line
@@ -28,6 +28,7 @@
#include "cam.h"
#include "base.h"
#include "ps.h"
#include "pwrseqcmd.h"

#include "btcoexist/rtl_btc.h"
#include <linux/firmware.h>
@@ -1670,6 +1671,103 @@ static void rtl_op_flush(struct ieee80211_hw *hw,
		rtlpriv->intf_ops->flush(hw, queues, drop);
}

/*	Description:
 *		This routine deals with the Power Configuration CMD
 *		 parsing for RTL8723/RTL8188E Series IC.
 *	Assumption:
 *		We should follow specific format that was released from HW SD.
 */
bool rtl_hal_pwrseqcmdparsing(struct rtl_priv *rtlpriv, u8 cut_version,
			      u8 faversion, u8 interface_type,
			      struct wlan_pwr_cfg pwrcfgcmd[])
{
	struct wlan_pwr_cfg cfg_cmd = {0};
	bool polling_bit = false;
	u32 ary_idx = 0;
	u8 value = 0;
	u32 offset = 0;
	u32 polling_count = 0;
	u32 max_polling_cnt = 5000;

	do {
		cfg_cmd = pwrcfgcmd[ary_idx];
		RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
			 "rtl_hal_pwrseqcmdparsing(): offset(%#x),cut_msk(%#x), famsk(%#x), interface_msk(%#x), base(%#x), cmd(%#x), msk(%#x), value(%#x)\n",
			 GET_PWR_CFG_OFFSET(cfg_cmd),
					    GET_PWR_CFG_CUT_MASK(cfg_cmd),
			 GET_PWR_CFG_FAB_MASK(cfg_cmd),
					      GET_PWR_CFG_INTF_MASK(cfg_cmd),
			 GET_PWR_CFG_BASE(cfg_cmd), GET_PWR_CFG_CMD(cfg_cmd),
			 GET_PWR_CFG_MASK(cfg_cmd), GET_PWR_CFG_VALUE(cfg_cmd));

		if ((GET_PWR_CFG_FAB_MASK(cfg_cmd)&faversion) &&
		    (GET_PWR_CFG_CUT_MASK(cfg_cmd)&cut_version) &&
		    (GET_PWR_CFG_INTF_MASK(cfg_cmd)&interface_type)) {
			switch (GET_PWR_CFG_CMD(cfg_cmd)) {
			case PWR_CMD_READ:
				RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
					"rtl_hal_pwrseqcmdparsing(): PWR_CMD_READ\n");
				break;
			case PWR_CMD_WRITE:
				RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
					"rtl_hal_pwrseqcmdparsing(): PWR_CMD_WRITE\n");
				offset = GET_PWR_CFG_OFFSET(cfg_cmd);

				/*Read the value from system register*/
				value = rtl_read_byte(rtlpriv, offset);
				value &= (~(GET_PWR_CFG_MASK(cfg_cmd)));
				value |= (GET_PWR_CFG_VALUE(cfg_cmd) &
					  GET_PWR_CFG_MASK(cfg_cmd));

				/*Write the value back to sytem register*/
				rtl_write_byte(rtlpriv, offset, value);
				break;
			case PWR_CMD_POLLING:
				RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
					"rtl_hal_pwrseqcmdparsing(): PWR_CMD_POLLING\n");
				polling_bit = false;
				offset = GET_PWR_CFG_OFFSET(cfg_cmd);

				do {
					value = rtl_read_byte(rtlpriv, offset);

					value &= GET_PWR_CFG_MASK(cfg_cmd);
					if (value ==
					    (GET_PWR_CFG_VALUE(cfg_cmd) &
					     GET_PWR_CFG_MASK(cfg_cmd)))
						polling_bit = true;
					else
						udelay(10);

					if (polling_count++ > max_polling_cnt)
						return false;
				} while (!polling_bit);
				break;
			case PWR_CMD_DELAY:
				RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
					 "rtl_hal_pwrseqcmdparsing(): PWR_CMD_DELAY\n");
				if (GET_PWR_CFG_VALUE(cfg_cmd) ==
				    PWRSEQ_DELAY_US)
					udelay(GET_PWR_CFG_OFFSET(cfg_cmd));
				else
					mdelay(GET_PWR_CFG_OFFSET(cfg_cmd));
				break;
			case PWR_CMD_END:
				RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
					 "rtl_hal_pwrseqcmdparsing(): PWR_CMD_END\n");
				return true;
			default:
				RT_ASSERT(false,
					  "rtl_hal_pwrseqcmdparsing(): Unknown CMD!!\n");
				break;
			}
		}
		ary_idx++;
	} while (1);

	return true;
}
EXPORT_SYMBOL(rtl_hal_pwrseqcmdparsing);
const struct ieee80211_ops rtl_ops = {
	.start = rtl_op_start,
	.stop = rtl_op_stop,
+0 −1
Original line number Diff line number Diff line
@@ -5,7 +5,6 @@ rtl8188ee-objs := \
		led.o		\
		phy.o		\
		pwrseq.o	\
		pwrseqcmd.o	\
		rf.o		\
		sw.o		\
		table.o		\
+3 −4
Original line number Diff line number Diff line
@@ -37,7 +37,6 @@
#include "fw.h"
#include "led.h"
#include "hw.h"
#include "pwrseqcmd.h"
#include "pwrseq.h"

#define LLT_CONFIG		5
@@ -850,7 +849,7 @@ static bool _rtl88ee_init_mac(struct ieee80211_hw *hw)
	/* HW Power on sequence */
	if (!rtl_hal_pwrseqcmdparsing(rtlpriv, PWR_CUT_ALL_MSK,
				      PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,
				      RTL8188E_NIC_ENABLE_FLOW)) {
				      RTL8188EE_NIC_ENABLE_FLOW)) {
		RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
			 "init MAC Fail as rtl_hal_pwrseqcmdparsing\n");
		return false;
@@ -1422,7 +1421,7 @@ static void _rtl88ee_poweroff_adapter(struct ieee80211_hw *hw)

	rtl_hal_pwrseqcmdparsing(rtlpriv, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK,
				 PWR_INTF_PCI_MSK,
				 RTL8188E_NIC_LPS_ENTER_FLOW);
				 RTL8188EE_NIC_LPS_ENTER_FLOW);

	rtl_write_byte(rtlpriv, REG_RF_CTRL, 0x00);

@@ -1437,7 +1436,7 @@ static void _rtl88ee_poweroff_adapter(struct ieee80211_hw *hw)
	rtl_write_byte(rtlpriv, REG_32K_CTRL, (u1b_tmp & (~BIT(0))));

	rtl_hal_pwrseqcmdparsing(rtlpriv, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK,
				 PWR_INTF_PCI_MSK, RTL8188E_NIC_DISABLE_FLOW);
				 PWR_INTF_PCI_MSK, RTL8188EE_NIC_DISABLE_FLOW);

	u1b_tmp = rtl_read_byte(rtlpriv, REG_RSV_CTRL+1);
	rtl_write_byte(rtlpriv, REG_RSV_CTRL+1, (u1b_tmp & (~BIT(3))));
+0 −4
Original line number Diff line number Diff line
@@ -2100,10 +2100,6 @@ void rtl88e_phy_lc_calibrate(struct ieee80211_hw *hw)
	rtlphy->lck_inprogress = false;
}

void rtl92c_phy_ap_calibrate(struct ieee80211_hw *hw, char delta)
{
}

void rtl88e_phy_set_rfpath_switch(struct ieee80211_hw *hw, bool bmain)
{
	_rtl88e_phy_set_rfpath_switch(hw, bmain, false);
+0 −1
Original line number Diff line number Diff line
@@ -222,7 +222,6 @@ void rtl88e_phy_set_bw_mode(struct ieee80211_hw *hw,
void rtl88e_phy_sw_chnl_callback(struct ieee80211_hw *hw);
u8 rtl88e_phy_sw_chnl(struct ieee80211_hw *hw);
void rtl88e_phy_iq_calibrate(struct ieee80211_hw *hw, bool b_recovery);
void rtl92c_phy_ap_calibrate(struct ieee80211_hw *hw, char delta);
void rtl88e_phy_lc_calibrate(struct ieee80211_hw *hw);
void rtl88e_phy_set_rfpath_switch(struct ieee80211_hw *hw, bool bmain);
bool rtl88e_phy_config_rf_with_headerfile(struct ieee80211_hw *hw,
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