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Commit 21e4b072 authored by Larry Finger's avatar Larry Finger Committed by John W. Linville
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rtlwifi: rtl8821ae: Move driver from staging to regular tree



This driver was entered into staging a few cycles ago because there was
not time to integrate the Realtek version into the support routines in
the kernel. Now that there is an effort to converg the code base from Linux
and the Realtek repo, it is time to move this driver. In addition, all the
updates included in the 06/28/2014 version of the Realtek drivers are
included here.

With this change, it will be necessary to delete the staging driver. That
will be handled in a separate patch. As it impacts the staging tree, such a
patch is sent to a different destination.

Signed-off-by: default avatarLarry Finger <Larry.Finger@lwfinger.net>
Signed-off-by: default avatarJohn W. Linville <linville@tuxdriver.com>
parent c151aed6
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+12 −1
Original line number Diff line number Diff line
@@ -5,7 +5,7 @@ menuconfig RTL_CARDS
	---help---
	  This option will enable support for the Realtek mac80211-based
	  wireless drivers. Drivers rtl8192ce, rtl8192cu, rtl8192se, rtl8192de,
	  rtl8723ae, rtl8723be, and rtl8188ae share some common code.
	  rtl8723ae, rtl8723be, rtl8188ee, and rtl8821ae share some common code.

if RTL_CARDS

@@ -80,6 +80,17 @@ config RTL8188EE

	If you choose to build it as a module, it will be called rtl8188ee

config RTL8821AE
	tristate "Realtek RTL8821AE/RTL8812AE Wireless Network Adapter"
	depends on PCI
	select RTLWIFI
	select RTLWIFI_PCI
	---help---
	This is the driver for Realtek RTL8i821AE/RTL8812AE 802.11av PCIe
	wireless network adapters.

	If you choose to build it as a module, it will be called rtl8821ae

config RTL8192CU
	tristate "Realtek RTL8192CU/RTL8188CU USB Wireless Network Adapter"
	depends on USB
+1 −0
Original line number Diff line number Diff line
@@ -28,5 +28,6 @@ obj-$(CONFIG_RTL8723BE) += rtl8723be/
obj-$(CONFIG_RTL8188EE)		+= rtl8188ee/
obj-$(CONFIG_RTLBTCOEXIST)	+= btcoexist/
obj-$(CONFIG_RTL8723_COMMON)	+= rtl8723com/
obj-$(CONFIG_RTL8821AE)		+= rtl8821ae/

ccflags-y += -D__CHECK_ENDIAN__
+1 −0
Original line number Diff line number Diff line
@@ -104,6 +104,7 @@
#define COMP_USB			BIT(29)
#define COMP_EASY_CONCURRENT	COMP_USB /* reuse of this bit is OK */
#define COMP_BT_COEXIST			BIT(30)
#define COMP_IQK			BIT(31)

/*--------------------------------------------------------------
		Define the rt_print components
+94 −0
Original line number Diff line number Diff line
/******************************************************************************
 *
 * Copyright(c) 2009-2012  Realtek Corporation.
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms of version 2 of the GNU General Public License as
 * published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful, but WITHOUT
 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 * more details.
 *
 * The full GNU General Public License is included in this distribution in the
 * file called LICENSE.
 *
 * Contact Information:
 * wlanfae <wlanfae@realtek.com>
 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
 * Hsinchu 300, Taiwan.
 *
 * Larry Finger <Larry.Finger@lwfinger.net>
 *
 *****************************************************************************/

#ifndef __RTL8723E_PWRSEQCMD_H__
#define __RTL8723E_PWRSEQCMD_H__

#include "wifi.h"
/*---------------------------------------------
 * 3 The value of cmd: 4 bits
 *---------------------------------------------
 */
#define    PWR_CMD_READ		0x00
#define    PWR_CMD_WRITE	0x01
#define    PWR_CMD_POLLING	0x02
#define    PWR_CMD_DELAY	0x03
#define    PWR_CMD_END		0x04

/* define the base address of each block */
#define   PWR_BASEADDR_MAC	0x00
#define   PWR_BASEADDR_USB	0x01
#define   PWR_BASEADDR_PCIE	0x02
#define   PWR_BASEADDR_SDIO	0x03

#define	PWR_INTF_SDIO_MSK	BIT(0)
#define	PWR_INTF_USB_MSK	BIT(1)
#define	PWR_INTF_PCI_MSK	BIT(2)
#define	PWR_INTF_ALL_MSK	(BIT(0)|BIT(1)|BIT(2)|BIT(3))

#define	PWR_FAB_TSMC_MSK	BIT(0)
#define	PWR_FAB_UMC_MSK		BIT(1)
#define	PWR_FAB_ALL_MSK		(BIT(0)|BIT(1)|BIT(2)|BIT(3))

#define	PWR_CUT_TESTCHIP_MSK	BIT(0)
#define	PWR_CUT_A_MSK		BIT(1)
#define	PWR_CUT_B_MSK		BIT(2)
#define	PWR_CUT_C_MSK		BIT(3)
#define	PWR_CUT_D_MSK		BIT(4)
#define	PWR_CUT_E_MSK		BIT(5)
#define	PWR_CUT_F_MSK		BIT(6)
#define	PWR_CUT_G_MSK		BIT(7)
#define	PWR_CUT_ALL_MSK		0xFF

enum pwrseq_delay_unit {
	PWRSEQ_DELAY_US,
	PWRSEQ_DELAY_MS,
};

struct wlan_pwr_cfg {
	u16 offset;
	u8 cut_msk;
	u8 fab_msk:4;
	u8 interface_msk:4;
	u8 base:4;
	u8 cmd:4;
	u8 msk;
	u8 value;
};

#define	GET_PWR_CFG_OFFSET(__PWR_CMD)	(__PWR_CMD.offset)
#define	GET_PWR_CFG_CUT_MASK(__PWR_CMD)	(__PWR_CMD.cut_msk)
#define	GET_PWR_CFG_FAB_MASK(__PWR_CMD)	(__PWR_CMD.fab_msk)
#define	GET_PWR_CFG_INTF_MASK(__PWR_CMD)	(__PWR_CMD.interface_msk)
#define	GET_PWR_CFG_BASE(__PWR_CMD)	(__PWR_CMD.base)
#define	GET_PWR_CFG_CMD(__PWR_CMD)	(__PWR_CMD.cmd)
#define	GET_PWR_CFG_MASK(__PWR_CMD)	(__PWR_CMD.msk)
#define	GET_PWR_CFG_VALUE(__PWR_CMD)	(__PWR_CMD.value)

bool rtl_hal_pwrseqcmdparsing(struct rtl_priv *rtlpriv, u8 cut_version,
			      u8 fab_version, u8 interface_type,
			      struct wlan_pwr_cfg pwrcfgcmd[]);

#endif
+19 −0
Original line number Diff line number Diff line
obj-m := rtl8821ae.o


rtl8821ae-objs :=		\
		dm.o		\
		fw.o		\
		hw.o		\
		led.o		\
		phy.o		\
		pwrseq.o	\
		rf.o		\
		sw.o		\
		table.o		\
		trx.o		\


obj-$(CONFIG_RTL8821AE) += rtl8821ae.o

ccflags-y += -D__CHECK_ENDIAN__
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