cnss2: Set WLAON_QFPROM_PWR_CTRL_REG during power on and off

After device power on and link config, clear VDD4BLOW_EN bit
of WLAON_QFPROM_PWR_CTRL_REG register to disable OTP write.
Before device link suspend and power off, clear VDD4BLOW_EN bit
and set SHUTDOWN_EN bit. Also add a 1ms sleep after writing
WLAON_QFPROM_PWR_CTRL_REG register.

Add a DTSI entry to control above operations.

Change-Id: Icb307a85bb5d283b78bdd7615f9a4757867c8075
CRs-Fixed: 2601850
Signed-off-by: Yue Ma <yuem@codeaurora.org>