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Commit 2ad5c1a5 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'pxa-dt-4.10' of https://github.com/rjarzmik/linux into next/dt 

Pull "This device-tree pxa update brings" from Robert Jarzmik:

 - pxa25x support
 - cpu operating points in preparation for cpufreq-dt
 - small fixes

* tag 'pxa-dt-4.10' of https://github.com/rjarzmik/linux:
  ARM: dts: pxa: add pxa27x cpu operating points
  ARM: dts: pxa: add pxa25x cpu operating points
  ARM: dts: pxa: fix gpio0 and gpio1 interrupts
  ARM: dts: pxa: fix no. of gpio cells in the pxa gpio binding documentation
  ARM: dts: pxa: add pxa25x .dtsi file
parents c00f3188 74e382b8

Documentation/devicetree/bindings/gpio/mrvl-gpio.txt

+4 −2
Original line number Diff line number Diff line
@@ -17,7 +17,9 @@ Required properties: 
- #interrupt-cells: Specifies the number of cells needed to encode an

  interrupt source.

- gpio-controller : Marks the device node as a gpio controller.

- #gpio-cells : Should be one.  It is the pin number.

- #gpio-cells : Should be two.  The first cell is the pin number and

  the second cell is used to specify flags. See gpio.txt for possible

  values.



Example for a MMP platform:
@@ -27,7 +29,7 @@ Example for a MMP platform: 
		interrupts = <49>;

		interrupt-names = "gpio_mux";

		gpio-controller;

		#gpio-cells = <1>;

		#gpio-cells = <2>;

		interrupt-controller;

		#interrupt-cells = <1>;

      };

arch/arm/boot/dts/pxa25x.dtsi

0 → 100644
+117 −0
Original line number Diff line number Diff line 
/*

 * Copyright (C) 2016 Robert Jarzmik <robert.jarzmik@free.fr>

 *

 * The code contained herein is licensed under the GNU General Public

 * License. You may obtain a copy of the GNU General Public License

 * Version 2 or later at the following locations:

 *

 * http://www.opensource.org/licenses/gpl-license.html

 * http://www.gnu.org/copyleft/gpl.html

 */

#include "pxa2xx.dtsi"

#include "dt-bindings/clock/pxa-clock.h"



/ {

	model = "Marvell PXA25x family SoC";

	compatible = "marvell,pxa250";



	clocks {

	       /*

		* The muxing of external clocks/internal dividers for osc* clock

		* sources has been hidden under the carpet by now.

		*/

		#address-cells = <1>;

		#size-cells = <1>;

		ranges;



		clks: pxa2xx_clks@41300004 {

			compatible = "marvell,pxa250-core-clocks";

			#clock-cells = <1>;

			status = "okay";

		};



		/* timer oscillator */

		clktimer: oscillator {

			compatible = "fixed-clock";

			#clock-cells = <0>;

			clock-frequency  = <3686400>;

			clock-output-names = "ostimer";

		};

	};



	pxabus {

		pdma: dma-controller@40000000 {

			compatible = "marvell,pdma-1.0";

			reg = <0x40000000 0x10000>;

			interrupts = <25>;

			#dma-channels = <16>;

			#dma-cells = <2>;

			#dma-requests = <40>;

			status = "okay";

		};



		pxairq: interrupt-controller@40d00000 {

			marvell,intc-priority;

			marvell,intc-nr-irqs = <32>;

		};



		pinctrl: pinctrl@40e00000 {

			reg = <0x40e00054 0x20 0x40e0000c 0xc 0x40e0010c 4

			       0x40f00020 0x10>;

			compatible = "marvell,pxa25x-pinctrl";

		};



		gpio: gpio@40e00000 {

			compatible = "intel,pxa25x-gpio";

			gpio-ranges = <&pinctrl 0 0 84>;

			clocks = <&clks CLK_NONE>;

		};



		pwm0: pwm@40b00000 {

			compatible = "marvell,pxa250-pwm";

			reg = <0x40b00000 0x10>;

			#pwm-cells = <1>;

			clocks = <&clks CLK_PWM0>;

		};



		pwm1: pwm@40b00010 {

			compatible = "marvell,pxa250-pwm";

			reg = <0x40b00010 0x10>;

			#pwm-cells = <1>;

			clocks = <&clks CLK_PWM1>;

		};

	};



	timer@40a00000 {

		compatible = "marvell,pxa-timer";

		reg = <0x40a00000 0x20>;

		interrupts = <26>;

		clocks = <&clktimer>;

		status = "okay";

	};



	pxa250_opp_table: opp_table0 {

		compatible = "operating-points-v2";



		opp@99532800 {

			opp-hz = /bits/ 64 <99532800>;

			opp-microvolt = <1000000 950000 1650000>;

			clock-latency-ns = <20>;

		};

		opp@199065600 {

			opp-hz = /bits/ 64 <199065600>;

			opp-microvolt = <1000000 950000 1650000>;

			clock-latency-ns = <20>;

		};

		opp@298598400 {

			opp-hz = /bits/ 64 <298598400>;

			opp-microvolt = <1100000 1045000 1650000>;

			clock-latency-ns = <20>;

		};

		opp@398131200 {

			opp-hz = /bits/ 64 <398131200>;

			opp-microvolt = <1300000 1235000 1650000>;

			clock-latency-ns = <20>;

		};

	};

};

arch/arm/boot/dts/pxa27x.dtsi

+40 −0
Original line number Diff line number Diff line
@@ -137,4 +137,44 @@ 
		clocks = <&clks CLK_OSTIMER>;

		status = "okay";

	};



	pxa270_opp_table: opp_table0 {

		compatible = "operating-points-v2";



		opp@104000000 {

			opp-hz = /bits/ 64 <104000000>;

			opp-microvolt = <900000 900000 1705000>;

			clock-latency-ns = <20>;

		};

		opp@156000000 {

			opp-hz = /bits/ 64 <156000000>;

			opp-microvolt = <1000000 1000000 1705000>;

			clock-latency-ns = <20>;

		};

		opp@208000000 {

			opp-hz = /bits/ 64 <208000000>;

			opp-microvolt = <1180000 1180000 1705000>;

			clock-latency-ns = <20>;

		};

		opp@312000000 {

			opp-hz = /bits/ 64 <312000000>;

			opp-microvolt = <1250000 1250000 1705000>;

			clock-latency-ns = <20>;

		};

		opp@416000000 {

			opp-hz = /bits/ 64 <416000000>;

			opp-microvolt = <1350000 1350000 1705000>;

			clock-latency-ns = <20>;

		};

		opp@520000000 {

			opp-hz = /bits/ 64 <520000000>;

			opp-microvolt = <1450000 1450000 1705000>;

			clock-latency-ns = <20>;

		};

		opp@624000000 {

			opp-hz = /bits/ 64 <624000000>;

			opp-microvolt = <1550000 1550000 1705000>;

			clock-latency-ns = <20>;

		};

	};

};

arch/arm/boot/dts/pxa2xx.dtsi

+2 −2
Original line number Diff line number Diff line
@@ -54,8 +54,8 @@ 
			reg = <0x40e00000 0x10000>;

			gpio-controller;

			#gpio-cells = <0x2>;

			interrupts = <10>;

			interrupt-names = "gpio_mux";

			interrupts = <8>, <9>, <10>;

			interrupt-names = "gpio0", "gpio1", "gpio_mux";

			interrupt-controller;

			#interrupt-cells = <0x2>;

			ranges;