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Commit 2ad4b53b authored by Naveen Yadav's avatar Naveen Yadav Committed by Gerrit - the friendly Code Review server
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ARM: dts: Add clock measure support for DDR clock for SDXPRAIRIE 



Add measure_only_mccc_clk (memory controller clock controller)
to measure DDR frequency for SDXPRAIRIE.

Change-Id: I50d29ecbaf3ea727a4f4f0e71d42804310bf1ca2
Signed-off-by: default avatarNaveen Yadav <naveenky@codeaurora.org>
parent 246ebaf1

arch/arm64/boot/dts/qcom/sdxprairie.dtsi

+6 −1
Original line number Original line Diff line number Diff line
@@ -326,9 +326,9 @@ 




	clock_debugcc: qcom,cc-debug {

	clock_debugcc: qcom,cc-debug {

		compatible = "qcom,debugcc-sdxprairie";

		compatible = "qcom,debugcc-sdxprairie";

		qcom,cc-count = <2>;

		qcom,gcc = <&clock_gcc>;

		qcom,gcc = <&clock_gcc>;

		qcom,cpucc = <&cpucc_debug>;

		qcom,cpucc = <&cpucc_debug>;

		qcom,mccc = <&mccc_debug>;

		clock-names = "xo_clk_src";

		clock-names = "xo_clk_src";

		clocks = <&clock_rpmh RPMH_CXO_CLK>;

		clocks = <&clock_rpmh RPMH_CXO_CLK>;

		#clock-cells = <1>;

		#clock-cells = <1>;
@@ -357,6 +357,11 @@ 
		reg = <0x1781101c 0x4>;

		reg = <0x1781101c 0x4>;

	};

	};





	mccc_debug: syscon@90b0000 {

		compatible = "syscon";

		reg = <0x90b0000 0x800>;

	};



	spmi_bus: qcom,spmi@c440000 {

	spmi_bus: qcom,spmi@c440000 {

		compatible = "qcom,spmi-pmic-arb";

		compatible = "qcom,spmi-pmic-arb";

		reg = <0xc440000 0xd00>,

		reg = <0xc440000 0xd00>,

drivers/clk/qcom/debugcc-sdxprairie.c

+6 −1
Original line number Original line Diff line number Diff line
@@ -103,6 +103,7 @@ static struct clk_debug_mux gcc_debug_mux = { 
	.src_sel_shift = 0,

	.src_sel_shift = 0,

	.post_div_mask = 0xF,

	.post_div_mask = 0xF,

	.post_div_shift = 0,

	.post_div_shift = 0,

	.period_offset = 0x50,

	MUX_SRC_LIST(

	MUX_SRC_LIST(

		{ "gcc_ahb_pcie_link_clk", 0xCF, 4, GCC,

		{ "gcc_ahb_pcie_link_clk", 0xCF, 4, GCC,

			0xCF, 0x3FF, 0, 0xF, 0, 4, 0x79000, 0x29000, 0x29004 },

			0xCF, 0x3FF, 0, 0xF, 0, 4, 0x79000, 0x29000, 0x29004 },
@@ -214,7 +215,7 @@ static struct clk_debug_mux gcc_debug_mux = { 
			0x63, 0x3FF, 0, 0xF, 0, 4, 0x79000, 0x29000, 0x29004 },

			0x63, 0x3FF, 0, 0xF, 0, 4, 0x79000, 0x29000, 0x29004 },

		{ "gcc_xo_pcie_link_clk", 0x77, 4, GCC,

		{ "gcc_xo_pcie_link_clk", 0x77, 4, GCC,

			0x77, 0x3FF, 0, 0xF, 0, 4, 0x79000, 0x29000, 0x29004 },

			0x77, 0x3FF, 0, 0xF, 0, 4, 0x79000, 0x29000, 0x29004 },

		{ "measure_only_bimc_clk", 0x73, 4, GCC,

		{ "measure_only_bimc_clk", 0x73, 4, MC_CC,

			0x73, 0x3FF, 0, 0xF, 0, 4, 0x79000, 0x29000, 0x29004 },

			0x73, 0x3FF, 0, 0xF, 0, 4, 0x79000, 0x29000, 0x29004 },

		{ "measure_only_ipa_2x_clk", 0xAC, 4, GCC,

		{ "measure_only_ipa_2x_clk", 0xAC, 4, GCC,

			0xAC, 0x3FF, 0, 0xF, 0, 4, 0x79000, 0x29000, 0x29004 },

			0xAC, 0x3FF, 0, 0xF, 0, 4, 0x79000, 0x29000, 0x29004 },
@@ -280,6 +281,10 @@ static int clk_debug_sdxprairie_probe(struct platform_device *pdev) 
	if (ret)

	if (ret)

		return ret;

		return ret;





	ret = map_debug_bases(pdev, "qcom,mccc", MC_CC);

	if (ret)

		return ret;



	clk = devm_clk_register(&pdev->dev, &gcc_debug_mux.hw);

	clk = devm_clk_register(&pdev->dev, &gcc_debug_mux.hw);

	if (IS_ERR(clk)) {

	if (IS_ERR(clk)) {

		dev_err(&pdev->dev, "Unable to register GCC debug mux\n");

		dev_err(&pdev->dev, "Unable to register GCC debug mux\n");