Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 20fde906 authored by Rakesh Pillai's avatar Rakesh Pillai Committed by nshrivas
Browse files

qcacld-3.0: Add different PLD vote for latency sensitive case

Any connection in 11g/a is very latency sensitive and
we need to vote for a higher DDR frequency than in
the other phy modes.

Identify the number of latency sensitive connections
in STA mode and vote for higher DDR frequency for the
latency sensitive cases.

Change-Id: I2ce20b2b40213bde52211eae659c9673c6e0d305
CRs-fixed: 2695045
parent 1825037d
Loading
Loading
Loading
Loading
0% Loading or .
You are about to add 0 people to the discussion. Proceed with caution.
Please register or to comment