UPSTREAM: coresight: tmc-etr: Allocate and free ETR memory buffers for CPU-wide scenarios

This patch uses the PID of the process being traced to allocate and free
ETR memory buffers for CPU-wide scenarios.  The implementation is tailored
to handle both N:1 and 1:1 source/sink HW topologies.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Tested-by: Leo Yan <leo.yan@linaro.org>
Tested-by: Robert Walker <robert.walker@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

(Upstream commit 3147da92a8a81fc304e6e9d7ac75b68d6a54d9f7).

Bug: 140266694
Change-Id: I3fbfd686d246e95bc72c474cfcaad2049eecfce8
Signed-off-by: Yabin Cui <yabinc@google.com>