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Commit 05d83f10 authored by qctecmdr Service's avatar qctecmdr Service Committed by Gerrit - the friendly Code Review server
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Merge "ARM: dts: msm: Add Qseecom node and Qseecom heap for qcs405"

parents dcd6f513 bc62561b

arch/arm64/boot/dts/qcom/qcs405-ion.dtsi

+6 −0
Original line number Diff line number Diff line
@@ -32,5 +32,11 @@ 
			memory-region = <&qseecom_mem>;

			qcom,ion-heap-type = "DMA";

		};



		qcom,ion-heap@19 { /* QSEECOM TA HEAP */

			reg = <19>;

			memory-region = <&qseecom_ta_mem>;

			qcom,ion-heap-type = "DMA";

		};

	};

};

arch/arm64/boot/dts/qcom/qcs405.dtsi

+22 −0
Original line number Diff line number Diff line
@@ -88,6 +88,13 @@ 
			size = <0 0x1000000>;

		};



		qseecom_ta_mem: qseecom_ta_region {

			compatible = "shared-dma-pool";

			reusable;

			alignment = <0 0x400000>;

			size = <0 0x400000>;

		};



		adsp_mem: adsp_region {

			compatible = "shared-dma-pool";

			reusable;
@@ -980,6 +987,21 @@ 
		};

	};



	qcom_seecom: qseecom@85800000 {

		compatible = "qcom,qseecom";

		reg = <0x85800000 0x600000>;

		reg-names = "secapp-region";

		qcom,hlos-num-ce-hw-instances = <1>;

		qcom,hlos-ce-hw-instance = <0>;

		qcom,qsee-ce-hw-instance = <0>;

		qcom,no-clock-support;

		qcom,msm-bus,name = "qseecom-noc";

		qcom,msm-bus,num-cases = <4>;

		qcom,msm-bus,num-paths = <1>;

		qcom,ce-opp-freq = <171430000>;

		qcom,qsee-reentrancy-support = <2>;

	};



	sdhc_1: sdhci@7804000 {

		compatible = "qcom,sdhci-msm-v5";

		reg = <0x7804000 0x1000>, <0x7805000 0x1000>;