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Commit fe107392 authored by Rafael J. Wysocki's avatar Rafael J. Wysocki
Browse files

Merge branch 'pm-cpufreq'

* pm-cpufreq:
  cpufreq: ppc: Remove duplicate inclusion of fsl_soc.h
  cpufreq: create another field .flags in cpufreq_frequency_table
  cpufreq: use kzalloc() to allocate memory for cpufreq_frequency_table
  cpufreq: don't print value of .driver_data from core
  cpufreq: ia64: don't set .driver_data to index
  cpufreq: powernv: Select CPUFreq related Kconfig options for powernv
  cpufreq: powernv: Use cpufreq_frequency_table.driver_data to store pstate ids
  cpufreq: powernv: cpufreq driver for powernv platform
  cpufreq: at32ap: don't declare local variable as static
  cpufreq: loongson2_cpufreq: don't declare local variable as static
  cpufreq: unicore32: fix typo issue for 'clk'
  cpufreq: exynos: Disable on multiplatform build
parents 8c73c4d8 f334a1e8
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+10 −10
Original line number Original line Diff line number Diff line
@@ -28,16 +28,16 @@ enum {
};
};


struct cpufreq_frequency_table loongson2_clockmod_table[] = {
struct cpufreq_frequency_table loongson2_clockmod_table[] = {
	{DC_RESV, CPUFREQ_ENTRY_INVALID},
	{0, DC_RESV, CPUFREQ_ENTRY_INVALID},
	{DC_ZERO, CPUFREQ_ENTRY_INVALID},
	{0, DC_ZERO, CPUFREQ_ENTRY_INVALID},
	{DC_25PT, 0},
	{0, DC_25PT, 0},
	{DC_37PT, 0},
	{0, DC_37PT, 0},
	{DC_50PT, 0},
	{0, DC_50PT, 0},
	{DC_62PT, 0},
	{0, DC_62PT, 0},
	{DC_75PT, 0},
	{0, DC_75PT, 0},
	{DC_87PT, 0},
	{0, DC_87PT, 0},
	{DC_DISABLE, 0},
	{0, DC_DISABLE, 0},
	{DC_RESV, CPUFREQ_TABLE_END},
	{0, DC_RESV, CPUFREQ_TABLE_END},
};
};
EXPORT_SYMBOL_GPL(loongson2_clockmod_table);
EXPORT_SYMBOL_GPL(loongson2_clockmod_table);


+1 −0
Original line number Original line Diff line number Diff line
@@ -306,3 +306,4 @@ CONFIG_KVM_BOOK3S_64=m
CONFIG_KVM_BOOK3S_64_HV=y
CONFIG_KVM_BOOK3S_64_HV=y
CONFIG_TRANSPARENT_HUGEPAGE=y
CONFIG_TRANSPARENT_HUGEPAGE=y
CONFIG_TRANSPARENT_HUGEPAGE_ALWAYS=y
CONFIG_TRANSPARENT_HUGEPAGE_ALWAYS=y
CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
+1 −0
Original line number Original line Diff line number Diff line
@@ -301,3 +301,4 @@ CONFIG_CRYPTO_LZO=m
# CONFIG_CRYPTO_ANSI_CPRNG is not set
# CONFIG_CRYPTO_ANSI_CPRNG is not set
CONFIG_CRYPTO_DEV_NX=y
CONFIG_CRYPTO_DEV_NX=y
CONFIG_CRYPTO_DEV_NX_ENCRYPT=m
CONFIG_CRYPTO_DEV_NX_ENCRYPT=m
CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
+4 −0
Original line number Original line Diff line number Diff line
@@ -272,6 +272,10 @@
#define SPRN_HSRR1	0x13B	/* Hypervisor Save/Restore 1 */
#define SPRN_HSRR1	0x13B	/* Hypervisor Save/Restore 1 */
#define SPRN_IC		0x350	/* Virtual Instruction Count */
#define SPRN_IC		0x350	/* Virtual Instruction Count */
#define SPRN_VTB	0x351	/* Virtual Time Base */
#define SPRN_VTB	0x351	/* Virtual Time Base */
#define SPRN_PMICR	0x354   /* Power Management Idle Control Reg */
#define SPRN_PMSR	0x355   /* Power Management Status Reg */
#define SPRN_PMCR	0x374	/* Power Management Control Register */

/* HFSCR and FSCR bit numbers are the same */
/* HFSCR and FSCR bit numbers are the same */
#define FSCR_TAR_LG	8	/* Enable Target Address Register */
#define FSCR_TAR_LG	8	/* Enable Target Address Register */
#define FSCR_EBB_LG	7	/* Enable Event Based Branching */
#define FSCR_EBB_LG	7	/* Enable Event Based Branching */
+6 −0
Original line number Original line Diff line number Diff line
@@ -11,6 +11,12 @@ config PPC_POWERNV
	select PPC_UDBG_16550
	select PPC_UDBG_16550
	select PPC_SCOM
	select PPC_SCOM
	select ARCH_RANDOM
	select ARCH_RANDOM
	select CPU_FREQ
	select CPU_FREQ_GOV_PERFORMANCE
	select CPU_FREQ_GOV_POWERSAVE
	select CPU_FREQ_GOV_USERSPACE
	select CPU_FREQ_GOV_ONDEMAND
	select CPU_FREQ_GOV_CONSERVATIVE
	default y
	default y


config PPC_POWERNV_RTAS
config PPC_POWERNV_RTAS
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