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Commit fc3fdfd6 authored by dmitry pervushin's avatar dmitry pervushin Committed by Russell King
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[ARM] 5537/1: Freescale STMP: 37nn registers definition



Add register definitions for Freescale STMP 37nn boards

Signed-off-by: default avatardmitry pervushin <dpervushin@embeddedalley.com>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent 98f420b2
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/*
 * stmp37xx: AUDIOIN register definitions
 *
 * Copyright (c) 2008 Freescale Semiconductor
 * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
 */
#define REGS_AUDIOIN_BASE	(STMP3XXX_REGS_BASE + 0x4C000)

#define HW_AUDIOIN_CTRL		0x0
#define BM_AUDIOIN_CTRL_RUN	0x00000001
#define BP_AUDIOIN_CTRL_RUN	0
#define BM_AUDIOIN_CTRL_FIFO_ERROR_IRQ_EN	0x00000002
#define BM_AUDIOIN_CTRL_FIFO_OVERFLOW_IRQ	0x00000004
#define BM_AUDIOIN_CTRL_FIFO_UNDERFLOW_IRQ	0x00000008
#define BM_AUDIOIN_CTRL_WORD_LENGTH	0x00000020
#define BM_AUDIOIN_CTRL_CLKGATE	0x40000000
#define BM_AUDIOIN_CTRL_SFTRST	0x80000000

#define HW_AUDIOIN_STAT		0x10

#define HW_AUDIOIN_ADCSRR	0x20

#define HW_AUDIOIN_ADCVOLUME	0x30
#define BM_AUDIOIN_ADCVOLUME_VOLUME_RIGHT	0x000000FF
#define BP_AUDIOIN_ADCVOLUME_VOLUME_RIGHT	0
#define BM_AUDIOIN_ADCVOLUME_VOLUME_LEFT	0x00FF0000
#define BP_AUDIOIN_ADCVOLUME_VOLUME_LEFT	16

#define HW_AUDIOIN_ADCDEBUG	0x40

#define HW_AUDIOIN_ADCVOL	0x50
#define BM_AUDIOIN_ADCVOL_GAIN_RIGHT	0x0000000F
#define BP_AUDIOIN_ADCVOL_GAIN_RIGHT	0
#define BM_AUDIOIN_ADCVOL_SELECT_RIGHT	0x00000030
#define BP_AUDIOIN_ADCVOL_SELECT_RIGHT	4
#define BM_AUDIOIN_ADCVOL_GAIN_LEFT	0x00000F00
#define BP_AUDIOIN_ADCVOL_GAIN_LEFT	8
#define BM_AUDIOIN_ADCVOL_SELECT_LEFT	0x00003000
#define BP_AUDIOIN_ADCVOL_SELECT_LEFT	12
#define BM_AUDIOIN_ADCVOL_MUTE	0x01000000

#define HW_AUDIOIN_MICLINE	0x60

#define HW_AUDIOIN_ANACLKCTRL	0x70
#define BM_AUDIOIN_ANACLKCTRL_CLKGATE	0x80000000

#define HW_AUDIOIN_DATA		0x80
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/*
 * stmp37xx: AUDIOOUT register definitions
 *
 * Copyright (c) 2008 Freescale Semiconductor
 * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
 */
#define REGS_AUDIOOUT_BASE	(STMP3XXX_REGS_BASE + 0x48000)

#define HW_AUDIOOUT_CTRL	0x0
#define BM_AUDIOOUT_CTRL_RUN	0x00000001
#define BP_AUDIOOUT_CTRL_RUN	0
#define BM_AUDIOOUT_CTRL_FIFO_ERROR_IRQ_EN	0x00000002
#define BM_AUDIOOUT_CTRL_FIFO_OVERFLOW_IRQ	0x00000004
#define BM_AUDIOOUT_CTRL_FIFO_UNDERFLOW_IRQ	0x00000008
#define BM_AUDIOOUT_CTRL_WORD_LENGTH	0x00000040
#define BM_AUDIOOUT_CTRL_CLKGATE	0x40000000
#define BM_AUDIOOUT_CTRL_SFTRST	0x80000000

#define HW_AUDIOOUT_STAT	0x10

#define HW_AUDIOOUT_DACSRR	0x20
#define BM_AUDIOOUT_DACSRR_SRC_FRAC	0x00001FFF
#define BP_AUDIOOUT_DACSRR_SRC_FRAC	0
#define BM_AUDIOOUT_DACSRR_SRC_INT	0x001F0000
#define BP_AUDIOOUT_DACSRR_SRC_INT	16
#define BM_AUDIOOUT_DACSRR_SRC_HOLD	0x07000000
#define BP_AUDIOOUT_DACSRR_SRC_HOLD	24
#define BM_AUDIOOUT_DACSRR_BASEMULT	0x70000000
#define BP_AUDIOOUT_DACSRR_BASEMULT	28

#define HW_AUDIOOUT_DACVOLUME	0x30
#define BM_AUDIOOUT_DACVOLUME_MUTE_RIGHT	0x00000100
#define BM_AUDIOOUT_DACVOLUME_MUTE_LEFT	0x01000000
#define BM_AUDIOOUT_DACVOLUME_EN_ZCD	0x02000000

#define HW_AUDIOOUT_DACDEBUG	0x40

#define HW_AUDIOOUT_HPVOL	0x50
#define BM_AUDIOOUT_HPVOL_MUTE	0x01000000
#define BM_AUDIOOUT_HPVOL_EN_MSTR_ZCD	0x02000000

#define HW_AUDIOOUT_PWRDN	0x70
#define BM_AUDIOOUT_PWRDN_HEADPHONE	0x00000001
#define BP_AUDIOOUT_PWRDN_HEADPHONE	0
#define BM_AUDIOOUT_PWRDN_CAPLESS	0x00000010
#define BM_AUDIOOUT_PWRDN_ADC	0x00000100
#define BM_AUDIOOUT_PWRDN_DAC	0x00001000
#define BM_AUDIOOUT_PWRDN_RIGHT_ADC	0x00010000
#define BM_AUDIOOUT_PWRDN_LINEOUT	0x01000000

#define HW_AUDIOOUT_REFCTRL	0x80
#define BM_AUDIOOUT_REFCTRL_VAG_VAL	0x000000F0
#define BP_AUDIOOUT_REFCTRL_VAG_VAL	4
#define BM_AUDIOOUT_REFCTRL_ADC_REFVAL	0x00000F00
#define BP_AUDIOOUT_REFCTRL_ADC_REFVAL	8
#define BM_AUDIOOUT_REFCTRL_ADJ_VAG	0x00001000
#define BM_AUDIOOUT_REFCTRL_ADJ_ADC	0x00002000
#define BM_AUDIOOUT_REFCTRL_BIAS_CTRL	0x00030000
#define BP_AUDIOOUT_REFCTRL_BIAS_CTRL	16
#define BM_AUDIOOUT_REFCTRL_LOW_PWR	0x00080000
#define BM_AUDIOOUT_REFCTRL_VBG_ADJ	0x00700000
#define BP_AUDIOOUT_REFCTRL_VBG_ADJ	20
#define BM_AUDIOOUT_REFCTRL_XTAL_BGR_BIAS	0x01000000
#define BM_AUDIOOUT_REFCTRL_RAISE_REF	0x02000000

#define HW_AUDIOOUT_ANACTRL	0x90
#define BM_AUDIOOUT_ANACTRL_HP_CLASSAB	0x00000010
#define BM_AUDIOOUT_ANACTRL_HP_HOLD_GND	0x00000020

#define HW_AUDIOOUT_TEST	0xA0
#define BM_AUDIOOUT_TEST_HP_I1_ADJ	0x00C00000
#define BP_AUDIOOUT_TEST_HP_I1_ADJ	22

#define HW_AUDIOOUT_BISTCTRL	0xB0

#define HW_AUDIOOUT_BISTSTAT0	0xC0

#define HW_AUDIOOUT_BISTSTAT1	0xD0

#define HW_AUDIOOUT_ANACLKCTRL	0xE0
#define BM_AUDIOOUT_ANACLKCTRL_CLKGATE	0x80000000

#define HW_AUDIOOUT_DATA	0xF0

#define HW_AUDIOOUT_LINEOUTCTRL	0x100
#define BM_AUDIOOUT_LINEOUTCTRL_VOL_RIGHT	0x0000001F
#define BP_AUDIOOUT_LINEOUTCTRL_VOL_RIGHT	0
#define BM_AUDIOOUT_LINEOUTCTRL_VOL_LEFT	0x00001F00
#define BP_AUDIOOUT_LINEOUTCTRL_VOL_LEFT	8
#define BM_AUDIOOUT_LINEOUTCTRL_CHARGE_CAP	0x00007000
#define BP_AUDIOOUT_LINEOUTCTRL_CHARGE_CAP	12
#define BM_AUDIOOUT_LINEOUTCTRL_VAG_CTRL	0x00F00000
#define BP_AUDIOOUT_LINEOUTCTRL_VAG_CTRL	20
#define BM_AUDIOOUT_LINEOUTCTRL_MUTE	0x01000000
#define BM_AUDIOOUT_LINEOUTCTRL_EN_ZCD	0x02000000

#define HW_AUDIOOUT_VERSION	0x200
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/*
 * stmp37xx: DIGCTL register definitions
 *
 * Copyright (c) 2008 Freescale Semiconductor
 * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
 */
#define REGS_DIGCTL_BASE	(STMP3XXX_REGS_BASE + 0x1C000)

#define HW_DIGCTL_CTRL		0x0
#define BM_DIGCTL_CTRL_USB_CLKGATE	0x00000004
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/*
 * stmp37xx: ECC8 register definitions
 *
 * Copyright (c) 2008 Freescale Semiconductor
 * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
 */
#define REGS_ECC8_BASE	(STMP3XXX_REGS_BASE + 0x8000)

#define HW_ECC8_CTRL		0x0
#define BM_ECC8_CTRL_COMPLETE_IRQ	0x00000001
#define BP_ECC8_CTRL_COMPLETE_IRQ	0
#define BM_ECC8_CTRL_COMPLETE_IRQ_EN	0x00000100
#define BM_ECC8_CTRL_AHBM_SFTRST	0x20000000

#define HW_ECC8_STATUS0		0x10
#define BM_ECC8_STATUS0_UNCORRECTABLE	0x00000004
#define BM_ECC8_STATUS0_CORRECTED	0x00000008
#define BM_ECC8_STATUS0_STATUS_AUX	0x00000F00
#define BP_ECC8_STATUS0_STATUS_AUX	8
#define BM_ECC8_STATUS0_COMPLETED_CE	0x000F0000
#define BP_ECC8_STATUS0_COMPLETED_CE	16

#define HW_ECC8_STATUS1		0x20
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/*
 * stmp37xx: GPMI register definitions
 *
 * Copyright (c) 2008 Freescale Semiconductor
 * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
 */
#define REGS_GPMI_BASE	(STMP3XXX_REGS_BASE + 0xC000)
#define REGS_GPMI_PHYS	0x8000C000
#define REGS_GPMI_SIZE	0x2000

#define HW_GPMI_CTRL0		0x0
#define BM_GPMI_CTRL0_XFER_COUNT	0x0000FFFF
#define BP_GPMI_CTRL0_XFER_COUNT	0
#define BM_GPMI_CTRL0_CS	0x00300000
#define BP_GPMI_CTRL0_CS	20
#define BM_GPMI_CTRL0_LOCK_CS	0x00400000
#define BM_GPMI_CTRL0_WORD_LENGTH	0x00800000
#define BM_GPMI_CTRL0_COMMAND_MODE	0x03000000
#define BP_GPMI_CTRL0_COMMAND_MODE	24
#define BV_GPMI_CTRL0_COMMAND_MODE__WRITE	    0x0
#define BV_GPMI_CTRL0_COMMAND_MODE__READ	     0x1
#define BV_GPMI_CTRL0_COMMAND_MODE__READ_AND_COMPARE 0x2
#define BV_GPMI_CTRL0_COMMAND_MODE__WAIT_FOR_READY   0x3
#define BM_GPMI_CTRL0_RUN	0x20000000
#define BM_GPMI_CTRL0_CLKGATE	0x40000000
#define BM_GPMI_CTRL0_SFTRST	0x80000000
#define BM_GPMI_ECCCTRL_ENABLE_ECC	0x00001000
#define BM_GPMI_ECCCTRL_ECC_CMD	0x00006000
#define BP_GPMI_ECCCTRL_ECC_CMD	13

#define HW_GPMI_CTRL1		0x60
#define BM_GPMI_CTRL1_GPMI_MODE	0x00000003
#define BP_GPMI_CTRL1_GPMI_MODE	0
#define BM_GPMI_CTRL1_ATA_IRQRDY_POLARITY	0x00000004
#define BM_GPMI_CTRL1_DEV_RESET	0x00000008
#define BM_GPMI_CTRL1_TIMEOUT_IRQ	0x00000200
#define BM_GPMI_CTRL1_DEV_IRQ	0x00000400
#define BM_GPMI_CTRL1_DSAMPLE_TIME	0x00007000
#define BP_GPMI_CTRL1_DSAMPLE_TIME	12

#define HW_GPMI_TIMING0		0x70
#define BM_GPMI_TIMING0_DATA_SETUP	0x000000FF
#define BP_GPMI_TIMING0_DATA_SETUP	0
#define BM_GPMI_TIMING0_DATA_HOLD	0x0000FF00
#define BP_GPMI_TIMING0_DATA_HOLD	8

#define HW_GPMI_TIMING1		0x80
#define BM_GPMI_TIMING1_DEVICE_BUSY_TIMEOUT	0xFFFF0000
#define BP_GPMI_TIMING1_DEVICE_BUSY_TIMEOUT	16
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