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Commit f5ad6d83 authored by Rohit Kumar's avatar Rohit Kumar Committed by Gerrit - the friendly Code Review server
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ARM: dts: msm: Enable external clock gpio for apq8017 



Add pinctrl for external clock gpio and enable them
for apq8017 no PMI configuration.

Change-Id: I98a17b6e6d8715cc067dadf5a0cb7224e3f4215f
Signed-off-by: default avatarRohit Kumar <rohitkr@codeaurora.org>
parent 5c636b45

arch/arm/boot/dts/qcom/apq8017-no-pmi-wcd-rome-cdp.dts

+2 −2
Original line number Diff line number Diff line
@@ -114,8 +114,8 @@ 
		qcom,lpass-mclk-id = "sec_mclk";

		qcom,codec-mclk-clk-freq = <12288000>;

		pinctrl-names = "sleep", "active";

		pinctrl-0 = <&sec_mi2s_mclk_a_sleep>;

		pinctrl-1 = <&sec_mi2s_mclk_a_active>;

		pinctrl-0 = <&pri_mi2s_mclk_b_default &sec_mi2s_mclk_a_sleep>;

		pinctrl-1 = <&pri_mi2s_mclk_b_default &sec_mi2s_mclk_a_active>;

	};

};

arch/arm/boot/dts/qcom/msm8917-pinctrl.dtsi

+15 −0
Original line number Diff line number Diff line
@@ -722,6 +722,21 @@ 
			};

		};



		pri_mi2s_mclk_b_lines {

			pri_mi2s_mclk_b_default: pri_mi2s_mclk_default {

				mux {

					pins = "gpio69";

					function = "pri_mi2s_mclk_b";

				};

				config {

					pins = "gpio69";

					drive-strength = <8>;

					bias-disable;

					input-enable;

				};

			};

		};



		sec_mi2s_mclk_a_lines {

			sec_mi2s_mclk_a_active: sec_mi2s_mclk_a_active {

				mux {