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Commit 5c636b45 authored by Aditya Bavanari's avatar Aditya Bavanari
Browse files

ARM: dts: msm: Add common audio device node include file for APQ8017 



Add a common audio device node file to include all the changes
of audio for APQ8017. Add a property qcom,msm-cpudai-tdm-clk-attribute
under all the TDM CPU DAI device nodes as this is used by
the DAI driver to set the TDM AFE clock attribute.

CRs-fixed: 2008308
Change-Id: I3e5c6003c2c178a2cc6611993734063a59ee18ad
Signed-off-by: default avatarAditya Bavanari <abavanar@codeaurora.org>
parent fdd109e3

arch/arm/boot/dts/qcom/apq8017-audio.dtsi

0 → 100644
+415 −0
Original line number Diff line number Diff line 
/*

 * Copyright (c) 2017, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and

 * only version 2 as published by the Free Software Foundation.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 */



&wsa881x_211 {

	qcom,spkr-sd-n-gpio = <&tlmm 92 0>;

};



&wsa881x_212 {

	qcom,spkr-sd-n-gpio = <&tlmm 92 0>;

};



&wsa881x_213 {

	qcom,spkr-sd-n-gpio = <&tlmm 92 0>;

};



&wsa881x_214 {

	qcom,spkr-sd-n-gpio = <&tlmm 92 0>;

};



&pm8937_gpios {

	gpio@c000 {

		status = "ok";

		qcom,mode = <1>;

		qcom,pull = <5>;

		qcom,vin-sel = <0>;

		qcom,src-sel = <2>;

		qcom,master-en = <1>;

		qcom,out-strength = <2>;

	};



	gpio@c600 {

		status = "ok";

		qcom,mode = <1>;

		qcom,pull = <5>;

		qcom,vin-sel = <0>;

		qcom,src-sel = <0>;

		qcom,master-en = <1>;

		qcom,out-strength = <2>;

	};

};



&slim_msm {

	status = "okay";

};



&dai_slim {

	status = "okay";

};



&wcd9xxx_intc {

	status = "okay";

};



&clock_audio {

	status = "okay";

};



&wcd9335 {

	status = "okay";

	cdc-vdd-mic-bias-supply = <&pm8917_l9>;

	qcom,cdc-vdd-mic-bias-voltage = <3300000 3300000>;

	qcom,cdc-vdd-mic-bias-current = <15000>;

};



&wcd_rst_gpio {

	status = "okay";

};



&ext_codec {

	status = "okay";

	qcom,msm-mbhc-hphl-swh = <1>;

	qcom,msm-mbhc-gnd-swh = <1>;

	qcom,tdm-audio-intf;

	reg = <0xc051000 0x4>,

		<0xc051004 0x4>,

		<0xc055000 0x4>,

		<0xc052000 0x4>,

		<0x0c056000 0x4>,

		<0x0c054000 0x4>,

		<0x0c053000 0x4>;

	reg-names = "csr_gp_io_mux_mic_ctl",

		"csr_gp_io_mux_spkr_ctl",

		"csr_gp_io_lpaif_pri_pcm_pri_mode_muxsel",

		"csr_gp_io_mux_quin_ctl",

		"csr_gp_io_lpaif_qui_pcm_sec_mode_muxsel",

		"csr_gp_io_mux_mic_ext_clk_ctl",

		"csr_gp_io_mux_sec_tlmm_ctl";

	qcom,audio-routing =

		"AIF4 VI", "MCLK",

		"AIF4 VI", "MICBIAS_REGULATOR",

		"RX_BIAS", "MCLK",

		"MADINPUT", "MCLK",

		"AIF4 MAD", "MICBIAS_REGULATOR",

		"AMIC1", "MIC BIAS3",

		"MIC BIAS3", "Handset Mic",

		"AMIC2", "MIC BIAS2",

		"MIC BIAS2", "Headset Mic",

		"AMIC3", "MIC BIAS3",

		"MIC BIAS3", "Secondary Mic",

		"AMIC4", "MIC BIAS3",

		"MIC BIAS3", "Analog Mic4",

		"AMIC5", "MIC BIAS4",

		"MIC BIAS4", "Analog Mic7",

		"AMIC6", "MIC BIAS4",

		"MIC BIAS4", "Analog Mic6",

		"DMIC0", "MIC BIAS1",

		"MIC BIAS1", "Digital Mic0",

		"DMIC1", "MIC BIAS1",

		"MIC BIAS1", "Digital Mic1",

		"DMIC2", "MIC BIAS3",

		"MIC BIAS3", "Digital Mic2",

		"DMIC3", "MIC BIAS3",

		"MIC BIAS3", "Digital Mic3",

		"DMIC4", "MIC BIAS4",

		"MIC BIAS4", "Digital Mic4",

		"DMIC5", "MIC BIAS4",

		"MIC BIAS4", "Digital Mic5",

		"MIC BIAS3", "MICBIAS_REGULATOR",

		"MIC BIAS4", "MICBIAS_REGULATOR",

		"SpkrLeft IN", "SPK1 OUT",

		"SpkrRight IN", "SPK2 OUT";

	asoc-cpu = <&dai_pri_auxpcm>,

		<&dai_mi2s2>, <&dai_mi2s3>, <&dai_mi2s5>,

		<&sb_0_rx>, <&sb_0_tx>, <&sb_1_rx>, <&sb_1_tx>,

		<&sb_2_rx>, <&sb_2_tx>, <&sb_3_rx>, <&sb_3_tx>,

		<&sb_4_rx>, <&sb_4_tx>, <&sb_5_tx>,

		<&afe_pcm_rx>, <&afe_pcm_tx>,

		<&afe_proxy_rx>, <&afe_proxy_tx>,

		<&incall_record_rx>, <&incall_record_tx>,

		<&incall_music_rx>, <&incall_music_2_rx>,

		<&sb_5_rx>,  <&bt_sco_rx>,

		<&bt_sco_tx>, <&int_fm_rx>, <&int_fm_tx>,

		<&sb_6_rx>, <&dai_pri_tdm_rx_0>, <&dai_pri_tdm_tx_0>,

		<&dai_sec_tdm_rx_0>, <&dai_sec_tdm_tx_0>;

	asoc-cpu-names = "msm-dai-q6-auxpcm.1",

			"msm-dai-q6-mi2s.2",

			"msm-dai-q6-mi2s.3", "msm-dai-q6-mi2s.5",

			"msm-dai-q6-dev.16384", "msm-dai-q6-dev.16385",

			"msm-dai-q6-dev.16386", "msm-dai-q6-dev.16387",

			"msm-dai-q6-dev.16388", "msm-dai-q6-dev.16389",

			"msm-dai-q6-dev.16390", "msm-dai-q6-dev.16391",

			"msm-dai-q6-dev.16392", "msm-dai-q6-dev.16393",

			"msm-dai-q6-dev.16395", "msm-dai-q6-dev.224",

			"msm-dai-q6-dev.225", "msm-dai-q6-dev.241",

			"msm-dai-q6-dev.240", "msm-dai-q6-dev.32771",

			"msm-dai-q6-dev.32772", "msm-dai-q6-dev.32773",

			"msm-dai-q6-dev.32770", "msm-dai-q6-dev.16394",

			"msm-dai-q6-dev.12288", "msm-dai-q6-dev.12289",

			"msm-dai-q6-dev.12292", "msm-dai-q6-dev.12293",

			"msm-dai-q6-dev.16396", "msm-dai-q6-tdm.36864",

			"msm-dai-q6-tdm.36865", "msm-dai-q6-tdm.36880",

			"msm-dai-q6-tdm.36881";

	qcom,msm-gpios =

		"quin_i2s",

		"us_eu_gpio",

		"sec_tdm",

		"pri_tdm";

	qcom,pinctrl-names =

		"all_off",

		"quin_act",

		"us_eu_gpio_act",

		"quin_us_eu_gpio_act",

		"sec_tdm_act",

		"sec_tdm_quin_i2s_act",

		"sec_tdm_us_eu_gpio_act",

		"sec_tdm_us_eu_gpio_quin_i2s_act",

		"pri_tdm_act",

		"pri_tdm_quin_i2s_act",

		"pri_tdm_us_eu_gpio_act",

		"pri_tdm_quin_i2s_us_eu_gpio_act",

		"pri_tdm_sec_tdm_act",

		"pri_tdm_sec_tdm_quin_i2s_act",

		"pri_tdm_sec_tdm_us_eu_gpio_act",

		"pri_tdm_sec_tdm_us_eu_gpio_quin_i2s_act";

	pinctrl-names =

		"all_off",

		"quin_act",

		"us_eu_gpio_act",

		"quin_us_eu_gpio_act",

		"sec_tdm_act",

		"sec_tdm_quin_i2s_act",

		"sec_tdm_us_eu_gpio_act",

		"sec_tdm_us_eu_gpio_quin_i2s_act",

		"pri_tdm_act",

		"pri_tdm_quin_i2s_act",

		"pri_tdm_us_eu_gpio_act",

		"pri_tdm_quin_i2s_us_eu_gpio_act",

		"pri_tdm_sec_tdm_act",

		"pri_tdm_sec_tdm_quin_i2s_act",

		"pri_tdm_sec_tdm_us_eu_gpio_act",

		"pri_tdm_sec_tdm_us_eu_gpio_quin_i2s_act";



	pinctrl-0 = <&pri_tlmm_ws_sus

		&cross_conn_det_sus &pri_mi2s_sd0_sleep

		&pri_mi2s_sck_sleep &pri_mi2s_sd1_sleep

		&sec_mi2s_ws_sleep &sec_mi2s_sck_sleep

		&sec_mi2s_sd1_sleep &sec_mi2s_sd0_sleep>;

	pinctrl-1 = <&pri_tlmm_ws_act

		&cross_conn_det_sus &pri_mi2s_sd0_active

		&pri_mi2s_sck_active &pri_mi2s_sd1_sleep

		&sec_mi2s_ws_sleep &sec_mi2s_sck_sleep

		&sec_mi2s_sd1_sleep &sec_mi2s_sd0_sleep>;

	pinctrl-2 = <&pri_tlmm_ws_sus

		&cross_conn_det_act &pri_mi2s_sd0_sleep

		&pri_mi2s_sck_sleep &pri_mi2s_sd1_sleep

		&sec_mi2s_ws_sleep &sec_mi2s_sck_sleep

		&sec_mi2s_sd1_sleep &sec_mi2s_sd0_sleep>;

	pinctrl-3 = <&pri_tlmm_ws_act

		&cross_conn_det_act &pri_mi2s_sd0_active

		&pri_mi2s_sck_active &pri_mi2s_sd1_sleep

		&sec_mi2s_ws_sleep &sec_mi2s_sck_sleep

		&sec_mi2s_sd1_sleep &sec_mi2s_sd0_sleep>;

	pinctrl-4 = <&pri_tlmm_ws_act

		&cross_conn_det_sus &pri_mi2s_sd0_active

		&pri_mi2s_sck_active &pri_mi2s_sd1_active

		&sec_mi2s_ws_sleep &sec_mi2s_sck_sleep

		&sec_mi2s_sd1_sleep &sec_mi2s_sd0_sleep>;

	pinctrl-5 = <&pri_tlmm_ws_act

		&cross_conn_det_sus &pri_mi2s_sd0_active

		&pri_mi2s_sck_active &pri_mi2s_sd1_active

		&sec_mi2s_ws_sleep &sec_mi2s_sck_sleep

		&sec_mi2s_sd1_sleep &sec_mi2s_sd0_sleep>;

	pinctrl-6 = <&pri_tlmm_ws_act

		&cross_conn_det_act &pri_mi2s_sd0_active

		&pri_mi2s_sck_active &pri_mi2s_sd1_active

		&sec_mi2s_ws_sleep &sec_mi2s_sck_sleep

		&sec_mi2s_sd1_sleep &sec_mi2s_sd0_sleep>;

	pinctrl-7 = <&pri_tlmm_ws_act

		&cross_conn_det_act &pri_mi2s_sd0_active

		&pri_mi2s_sck_active &pri_mi2s_sd1_active

		&sec_mi2s_ws_sleep &sec_mi2s_sck_sleep

		&sec_mi2s_sd1_sleep &sec_mi2s_sd0_sleep>;

	pinctrl-8 = <&pri_tlmm_ws_sus

		&cross_conn_det_sus &pri_mi2s_sd0_sleep

		&pri_mi2s_sck_sleep &pri_mi2s_sd1_sleep

		&sec_mi2s_ws_active &sec_mi2s_sck_active

		&sec_mi2s_sd1_active &sec_mi2s_sd0_active>;

	pinctrl-9 = <&pri_tlmm_ws_act

		&cross_conn_det_sus &pri_mi2s_sd0_active

		&pri_mi2s_sck_active &pri_mi2s_sd1_sleep

		&sec_mi2s_ws_active &sec_mi2s_sck_active

		&sec_mi2s_sd1_active &sec_mi2s_sd0_active>;

	pinctrl-10 = <&pri_tlmm_ws_sus

		&cross_conn_det_act &pri_mi2s_sd0_sleep

		&pri_mi2s_sck_sleep &pri_mi2s_sd1_sleep

		&sec_mi2s_ws_active &sec_mi2s_sck_active

		&sec_mi2s_sd1_active &sec_mi2s_sd0_active>;

	pinctrl-11 = <&pri_tlmm_ws_act

		&cross_conn_det_act &pri_mi2s_sd0_active

		&pri_mi2s_sck_active &pri_mi2s_sd1_sleep

		&sec_mi2s_ws_active &sec_mi2s_sck_active

		&sec_mi2s_sd1_active &sec_mi2s_sd0_active>;

	pinctrl-12 = <&pri_tlmm_ws_act

		&cross_conn_det_sus &pri_mi2s_sd0_active

		&pri_mi2s_sck_active &pri_mi2s_sd1_active

		&sec_mi2s_ws_active &sec_mi2s_sck_active

		&sec_mi2s_sd1_active &sec_mi2s_sd0_active>;

	pinctrl-13 = <&pri_tlmm_ws_act

		&cross_conn_det_sus &pri_mi2s_sd0_active

		&pri_mi2s_sck_active &pri_mi2s_sd1_active

		&sec_mi2s_ws_active &sec_mi2s_sck_active

		&sec_mi2s_sd1_active &sec_mi2s_sd0_active>;

	pinctrl-14 = <&pri_tlmm_ws_act

		&cross_conn_det_act &pri_mi2s_sd0_active

		&pri_mi2s_sck_active &pri_mi2s_sd1_active

		&sec_mi2s_ws_active &sec_mi2s_sck_active

		&sec_mi2s_sd1_active &sec_mi2s_sd0_active>;

	pinctrl-15 = <&pri_tlmm_ws_act

		&cross_conn_det_act &pri_mi2s_sd0_active

		&pri_mi2s_sck_active &pri_mi2s_sd1_active

		&sec_mi2s_ws_active &sec_mi2s_sck_active

		&sec_mi2s_sd1_active &sec_mi2s_sd0_active>;

};



&int_codec {

	status = "disabled";

};



&pm8937_cajon_dig {

	status = "disabled";

};



&pm8937_cajon_analog {

	status = "disabled";

};



&wsa881x_i2c_e {

	status = "disabled";

};



&wsa881x_i2c_44 {

	status = "disabled";

};



&wsa881x_i2c_f {

	status = "disabled";

};



&wsa881x_i2c_45 {

	status = "disabled";

};



&soc {

	qcom,msm-dai-tdm-pri-rx {

		compatible = "qcom,msm-dai-tdm";

		qcom,msm-cpudai-tdm-group-id = <37120>;

		qcom,msm-cpudai-tdm-group-num-ports = <1>;

		qcom,msm-cpudai-tdm-group-port-id = <36864>;

		qcom,msm-cpudai-tdm-clk-rate = <12288000>;

		qcom,msm-cpudai-tdm-clk-attribute = /bits/ 16 <1>;

		dai_pri_tdm_rx_0: qcom,msm-dai-q6-tdm-pri-rx-0 {

			compatible = "qcom,msm-dai-q6-tdm";

			qcom,msm-cpudai-tdm-dev-id = <36864>;

			qcom,msm-cpudai-tdm-sync-mode = <0>;

			qcom,msm-cpudai-tdm-sync-src = <1>;

			qcom,msm-cpudai-tdm-data-out = <0>;

			qcom,msm-cpudai-tdm-invert-sync = <0>;

			qcom,msm-cpudai-tdm-data-delay = <1>;

			qcom,msm-cpudai-tdm-data-align = <0>;

		};

	};



	qcom,msm-dai-tdm-pri-tx {

		compatible = "qcom,msm-dai-tdm";

		qcom,msm-cpudai-tdm-group-id = <37121>;

		qcom,msm-cpudai-tdm-group-num-ports = <1>;

		qcom,msm-cpudai-tdm-group-port-id = <36865>;

		qcom,msm-cpudai-tdm-clk-rate = <12288000>;

		qcom,msm-cpudai-tdm-clk-attribute = /bits/ 16 <1>;

		dai_pri_tdm_tx_0: qcom,msm-dai-q6-tdm-pri-tx-0 {

			compatible = "qcom,msm-dai-q6-tdm";

			qcom,msm-cpudai-tdm-dev-id = <36865>;

			qcom,msm-cpudai-tdm-sync-mode = <0>;

			qcom,msm-cpudai-tdm-sync-src = <1>;

			qcom,msm-cpudai-tdm-data-out = <0>;

			qcom,msm-cpudai-tdm-invert-sync = <0>;

			qcom,msm-cpudai-tdm-data-delay = <1>;

			qcom,msm-cpudai-tdm-data-align = <0>;

		};

	};



	qcom,msm-dai-tdm-sec-rx {

		compatible = "qcom,msm-dai-tdm";

		qcom,msm-cpudai-tdm-group-id = <37136>;

		qcom,msm-cpudai-tdm-group-num-ports = <1>;

		qcom,msm-cpudai-tdm-group-port-id = <36880>;

		qcom,msm-cpudai-tdm-clk-rate = <12288000>;

		qcom,msm-cpudai-tdm-clk-attribute = /bits/ 16 <1>;

		dai_sec_tdm_rx_0: qcom,msm-dai-q6-tdm-sec-rx-0 {

			compatible = "qcom,msm-dai-q6-tdm";

			qcom,msm-cpudai-tdm-dev-id = <36880>;

			qcom,msm-cpudai-tdm-sync-mode = <0>;

			qcom,msm-cpudai-tdm-sync-src = <1>;

			qcom,msm-cpudai-tdm-data-out = <0>;

			qcom,msm-cpudai-tdm-invert-sync = <0>;

			qcom,msm-cpudai-tdm-data-delay = <1>;

			qcom,msm-cpudai-tdm-data-align = <0>;

		};

	};



	qcom,msm-dai-tdm-sec-tx {

		compatible = "qcom,msm-dai-tdm";

		qcom,msm-cpudai-tdm-group-id = <37137>;

		qcom,msm-cpudai-tdm-group-num-ports = <1>;

		qcom,msm-cpudai-tdm-group-port-id = <36881>;

		qcom,msm-cpudai-tdm-clk-rate = <12288000>;

		qcom,msm-cpudai-tdm-clk-attribute = /bits/ 16 <1>;

		dai_sec_tdm_tx_0: qcom,msm-dai-q6-tdm-sec-tx-0 {

			compatible = "qcom,msm-dai-q6-tdm";

			qcom,msm-cpudai-tdm-dev-id = <36881>;

			qcom,msm-cpudai-tdm-sync-mode = <0>;

			qcom,msm-cpudai-tdm-sync-src = <1>;

			qcom,msm-cpudai-tdm-data-out = <0>;

			qcom,msm-cpudai-tdm-invert-sync = <0>;

			qcom,msm-cpudai-tdm-data-delay = <1>;

			qcom,msm-cpudai-tdm-data-align = <0>;

		};

	};

};



&tlmm {

	tlmm_gpio_key {

		gpio_key_active: gpio_key_active {

			mux {

				pins = "gpio91", "gpio127", "gpio128";

				function = "gpio";

			};



			config {

				pins = "gpio91", "gpio127", "gpio128";

			};

		};



		gpio_key_suspend: gpio_key_suspend {

			mux {

				pins = "gpio91", "gpio127", "gpio128";

				function = "gpio";

			};



			config {

				pins = "gpio91", "gpio127", "gpio128";

			};

		};

	};

};

arch/arm/boot/dts/qcom/apq8017-no-pmi-wcd-rome-cdp.dts

+1 −392
Original line number Diff line number Diff line
@@ -16,6 +16,7 @@ 
#include "apq8017.dtsi"

#include "apq8017-no-pmi-cdp.dtsi"

#include "apq8017-rome.dtsi"

#include "apq8017-audio.dtsi"



/ {

	model = "Qualcomm Technologies, Inc. APQ8017 CDP no-PMI \
@@ -93,28 +94,6 @@ 
	qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;

};



&pm8937_gpios {

	gpio@c000 {

		status = "ok";

		qcom,mode = <1>;

		qcom,pull = <5>;

		qcom,vin-sel = <0>;

		qcom,src-sel = <2>;

		qcom,master-en = <1>;

		qcom,out-strength = <2>;

	};



	gpio@c600 {

		status = "ok";

		qcom,mode = <1>;

		qcom,pull = <5>;

		qcom,vin-sel = <0>;

		qcom,src-sel = <0>;

		qcom,master-en = <1>;

		qcom,out-strength = <2>;

	};

};



&pm8937_mpps {

	mpp@a100 {

		status = "ok";
@@ -127,22 +106,6 @@ 
	};

};



&wsa881x_211 {

	qcom,spkr-sd-n-gpio = <&tlmm 92 0>;

};



&wsa881x_212 {

	qcom,spkr-sd-n-gpio = <&tlmm 92 0>;

};



&wsa881x_213 {

	qcom,spkr-sd-n-gpio = <&tlmm 92 0>;

};



&wsa881x_214 {

	qcom,spkr-sd-n-gpio = <&tlmm 92 0>;

};



&soc {

	clock_audio: audio_ext_clk {

		compatible = "qcom,audio-ref-clk";
@@ -157,365 +120,11 @@ 
};



&wcd9335 {

	status = "okay";

	cdc-vdd-mic-bias-supply = <&pm8917_l9>;

	qcom,cdc-vdd-mic-bias-voltage = <3300000 3300000>;

	qcom,cdc-vdd-mic-bias-current = <15000>;

	qcom,cdc-mclk-clk-rate = <12288000>;

	clock-names = "wcd_clk";

	clocks = <&clock_audio clk_audio_lpass_mclk>;

};



&int_codec {

	status = "disabled";

};



&pm8937_cajon_dig {

	status = "disabled";

};



&pm8937_cajon_analog {

	status = "disabled";

};



&wsa881x_i2c_e {

	status = "disabled";

};



&wsa881x_i2c_f {

	status = "disabled";

};



&wsa881x_i2c_44 {

	status = "disabled";

};



&wsa881x_i2c_45 {

	status = "disabled";

};



&ext_codec {

	status = "okay";

	qcom,msm-mbhc-hphl-swh = <1>;

	qcom,msm-mbhc-gnd-swh = <1>;

	qcom,tdm-audio-intf;

	reg = <0xc051000 0x4>,

		<0xc051004 0x4>,

		<0xc055000 0x4>,

		<0xc052000 0x4>,

		<0x0c056000 0x4>,

		<0x0c054000 0x4>,

		<0x0c053000 0x4>;

	reg-names = "csr_gp_io_mux_mic_ctl",

		"csr_gp_io_mux_spkr_ctl",

		"csr_gp_io_lpaif_pri_pcm_pri_mode_muxsel",

		"csr_gp_io_mux_quin_ctl",

		"csr_gp_io_lpaif_qui_pcm_sec_mode_muxsel",

		"csr_gp_io_mux_mic_ext_clk_ctl",

		"csr_gp_io_mux_sec_tlmm_ctl";

	qcom,audio-routing =

		"AIF4 VI", "MCLK",

		"AIF4 VI", "MICBIAS_REGULATOR",

		"RX_BIAS", "MCLK",

		"MADINPUT", "MCLK",

		"AIF4 MAD", "MICBIAS_REGULATOR",

		"AMIC1", "MIC BIAS3",

		"MIC BIAS3", "Handset Mic",

		"AMIC2", "MIC BIAS2",

		"MIC BIAS2", "Headset Mic",

		"AMIC3", "MIC BIAS3",

		"MIC BIAS3", "Secondary Mic",

		"AMIC4", "MIC BIAS3",

		"MIC BIAS3", "Analog Mic4",

		"AMIC5", "MIC BIAS4",

		"MIC BIAS4", "Analog Mic7",

		"AMIC6", "MIC BIAS4",

		"MIC BIAS4", "Analog Mic6",

		"DMIC0", "MIC BIAS1",

		"MIC BIAS1", "Digital Mic0",

		"DMIC1", "MIC BIAS1",

		"MIC BIAS1", "Digital Mic1",

		"DMIC2", "MIC BIAS3",

		"MIC BIAS3", "Digital Mic2",

		"DMIC3", "MIC BIAS3",

		"MIC BIAS3", "Digital Mic3",

		"DMIC4", "MIC BIAS4",

		"MIC BIAS4", "Digital Mic4",

		"DMIC5", "MIC BIAS4",

		"MIC BIAS4", "Digital Mic5",

		"MIC BIAS3", "MICBIAS_REGULATOR",

		"MIC BIAS4", "MICBIAS_REGULATOR",

		"SpkrLeft IN", "SPK1 OUT",

		"SpkrRight IN", "SPK2 OUT";

		asoc-cpu = <&dai_pri_auxpcm>,

			<&dai_mi2s2>, <&dai_mi2s3>, <&dai_mi2s5>,

			<&sb_0_rx>, <&sb_0_tx>, <&sb_1_rx>, <&sb_1_tx>,

			<&sb_2_rx>, <&sb_2_tx>, <&sb_3_rx>, <&sb_3_tx>,

			<&sb_4_rx>, <&sb_4_tx>, <&sb_5_tx>,

			<&afe_pcm_rx>, <&afe_pcm_tx>,

			<&afe_proxy_rx>, <&afe_proxy_tx>,

			<&incall_record_rx>, <&incall_record_tx>,

			<&incall_music_rx>, <&incall_music_2_rx>,

			<&sb_5_rx>,  <&bt_sco_rx>,

			<&bt_sco_tx>, <&int_fm_rx>, <&int_fm_tx>,

			<&sb_6_rx>, <&dai_pri_tdm_rx_0>, <&dai_pri_tdm_tx_0>,

			<&dai_sec_tdm_rx_0>, <&dai_sec_tdm_tx_0>;

		asoc-cpu-names = "msm-dai-q6-auxpcm.1",

				"msm-dai-q6-mi2s.2",

				"msm-dai-q6-mi2s.3", "msm-dai-q6-mi2s.5",

				"msm-dai-q6-dev.16384", "msm-dai-q6-dev.16385",

				"msm-dai-q6-dev.16386", "msm-dai-q6-dev.16387",

				"msm-dai-q6-dev.16388", "msm-dai-q6-dev.16389",

				"msm-dai-q6-dev.16390", "msm-dai-q6-dev.16391",

				"msm-dai-q6-dev.16392", "msm-dai-q6-dev.16393",

				"msm-dai-q6-dev.16395", "msm-dai-q6-dev.224",

				"msm-dai-q6-dev.225", "msm-dai-q6-dev.241",

				"msm-dai-q6-dev.240", "msm-dai-q6-dev.32771",

				"msm-dai-q6-dev.32772", "msm-dai-q6-dev.32773",

				"msm-dai-q6-dev.32770", "msm-dai-q6-dev.16394",

				"msm-dai-q6-dev.12288", "msm-dai-q6-dev.12289",

				"msm-dai-q6-dev.12292", "msm-dai-q6-dev.12293",

				"msm-dai-q6-dev.16396", "msm-dai-q6-tdm.36864",

				"msm-dai-q6-tdm.36865", "msm-dai-q6-tdm.36880",

				"msm-dai-q6-tdm.36881";

		qcom,msm-gpios =

			"quin_i2s",

			"us_eu_gpio",

			"sec_tdm",

			"pri_tdm";

		qcom,pinctrl-names =

			"all_off",

			"quin_act",

			"us_eu_gpio_act",

			"quin_us_eu_gpio_act",

			"sec_tdm_act",

			"sec_tdm_quin_i2s_act",

			"sec_tdm_us_eu_gpio_act",

			"sec_tdm_us_eu_gpio_quin_i2s_act",

			"pri_tdm_act",

			"pri_tdm_quin_i2s_act",

			"pri_tdm_us_eu_gpio_act",

			"pri_tdm_quin_i2s_us_eu_gpio_act",

			"pri_tdm_sec_tdm_act",

			"pri_tdm_sec_tdm_quin_i2s__act",

			"pri_tdm_sec_tdm_us_eu_gpio__act",

			"pri_tdm_sec_tdm__us_eu_gpio_quin_i2s_act";

		pinctrl-names =

			"all_off",

			"quin_act",

			"us_eu_gpio_act",

			"quin_us_eu_gpio_act",

			"sec_tdm_act",

			"sec_tdm_quin_i2s_act",

			"sec_tdm_us_eu_gpio_act",

			"sec_tdm_us_eu_gpio_quin_i2s_act",

			"pri_tdm_act",

			"pri_tdm_quin_i2s_act",

			"pri_tdm_us_eu_gpio_act",

			"pri_tdm_quin_i2s_us_eu_gpio_act",

			"pri_tdm_sec_tdm_act",

			"pri_tdm_sec_tdm_quin_i2s__act",

			"pri_tdm_sec_tdm_us_eu_gpio__act",

			"pri_tdm_sec_tdm__us_eu_gpio_quin_i2s_act";



		pinctrl-0 = <&pri_tlmm_ws_sus

			&cross_conn_det_sus &pri_mi2s_sd0_sleep

			&pri_mi2s_sck_sleep &pri_mi2s_sd1_sleep

			&sec_mi2s_ws_sleep &sec_mi2s_sck_sleep

			&sec_mi2s_sd1_sleep &sec_mi2s_sd0_sleep>;

		pinctrl-1 = <&pri_tlmm_ws_act

			&cross_conn_det_sus &pri_mi2s_sd0_active

			&pri_mi2s_sck_active &pri_mi2s_sd1_sleep

			&sec_mi2s_ws_sleep &sec_mi2s_sck_sleep

			&sec_mi2s_sd1_sleep &sec_mi2s_sd0_sleep>;

		pinctrl-2 = <&pri_tlmm_ws_sus

			&cross_conn_det_act &pri_mi2s_sd0_sleep

			&pri_mi2s_sck_sleep &pri_mi2s_sd1_sleep

			&sec_mi2s_ws_sleep &sec_mi2s_sck_sleep

			&sec_mi2s_sd1_sleep &sec_mi2s_sd0_sleep>;

		pinctrl-3 = <&pri_tlmm_ws_act

			&cross_conn_det_act &pri_mi2s_sd0_active

			&pri_mi2s_sck_active &pri_mi2s_sd1_sleep

			&sec_mi2s_ws_sleep &sec_mi2s_sck_sleep

			&sec_mi2s_sd1_sleep &sec_mi2s_sd0_sleep>;

		pinctrl-4 = <&pri_tlmm_ws_act

			&cross_conn_det_sus &pri_mi2s_sd0_active

			&pri_mi2s_sck_active &pri_mi2s_sd1_active

			&sec_mi2s_ws_sleep &sec_mi2s_sck_sleep

			&sec_mi2s_sd1_sleep &sec_mi2s_sd0_sleep>;

		pinctrl-5 = <&pri_tlmm_ws_act

			&cross_conn_det_sus &pri_mi2s_sd0_active

			&pri_mi2s_sck_active &pri_mi2s_sd1_active

			&sec_mi2s_ws_sleep &sec_mi2s_sck_sleep

			&sec_mi2s_sd1_sleep &sec_mi2s_sd0_sleep>;

		pinctrl-6 = <&pri_tlmm_ws_act

			&cross_conn_det_act &pri_mi2s_sd0_active

			&pri_mi2s_sck_active &pri_mi2s_sd1_active

			&sec_mi2s_ws_sleep &sec_mi2s_sck_sleep

			&sec_mi2s_sd1_sleep &sec_mi2s_sd0_sleep>;

		pinctrl-7 = <&pri_tlmm_ws_act

			&cross_conn_det_act &pri_mi2s_sd0_active

			&pri_mi2s_sck_active &pri_mi2s_sd1_active

			&sec_mi2s_ws_sleep &sec_mi2s_sck_sleep

			&sec_mi2s_sd1_sleep &sec_mi2s_sd0_sleep>;

		pinctrl-8 = <&pri_tlmm_ws_sus

			&cross_conn_det_sus &pri_mi2s_sd0_sleep

			&pri_mi2s_sck_sleep &pri_mi2s_sd1_sleep

			&sec_mi2s_ws_active &sec_mi2s_sck_active

			&sec_mi2s_sd1_active &sec_mi2s_sd0_active>;

		pinctrl-9 = <&pri_tlmm_ws_act

			&cross_conn_det_sus &pri_mi2s_sd0_active

			&pri_mi2s_sck_active &pri_mi2s_sd1_sleep

			&sec_mi2s_ws_active &sec_mi2s_sck_active

			&sec_mi2s_sd1_active &sec_mi2s_sd0_active>;

		pinctrl-10 = <&pri_tlmm_ws_sus

			&cross_conn_det_act &pri_mi2s_sd0_sleep

			&pri_mi2s_sck_sleep &pri_mi2s_sd1_sleep

			&sec_mi2s_ws_active &sec_mi2s_sck_active

			&sec_mi2s_sd1_active &sec_mi2s_sd0_active>;

		pinctrl-11 = <&pri_tlmm_ws_act

			&cross_conn_det_act &pri_mi2s_sd0_active

			&pri_mi2s_sck_active &pri_mi2s_sd1_sleep

			&sec_mi2s_ws_active &sec_mi2s_sck_active

			&sec_mi2s_sd1_active &sec_mi2s_sd0_active>;

		pinctrl-12 = <&pri_tlmm_ws_act

			&cross_conn_det_sus &pri_mi2s_sd0_active

			&pri_mi2s_sck_active &pri_mi2s_sd1_active

			&sec_mi2s_ws_active &sec_mi2s_sck_active

			&sec_mi2s_sd1_active &sec_mi2s_sd0_active>;

		pinctrl-13 = <&pri_tlmm_ws_act

			&cross_conn_det_sus &pri_mi2s_sd0_active

			&pri_mi2s_sck_active &pri_mi2s_sd1_active

			&sec_mi2s_ws_active &sec_mi2s_sck_active

			&sec_mi2s_sd1_active &sec_mi2s_sd0_active>;

		pinctrl-14 = <&pri_tlmm_ws_act

			&cross_conn_det_act &pri_mi2s_sd0_active

			&pri_mi2s_sck_active &pri_mi2s_sd1_active

			&sec_mi2s_ws_active &sec_mi2s_sck_active

			&sec_mi2s_sd1_active &sec_mi2s_sd0_active>;

		pinctrl-15 = <&pri_tlmm_ws_act

			&cross_conn_det_act &pri_mi2s_sd0_active

			&pri_mi2s_sck_active &pri_mi2s_sd1_active

			&sec_mi2s_ws_active &sec_mi2s_sck_active

			&sec_mi2s_sd1_active &sec_mi2s_sd0_active>;

};



&slim_msm {

	status = "okay";

};



&dai_slim {

	status = "okay";

};



&wcd9xxx_intc {

	status = "okay";

};



&wcd_rst_gpio {

	status = "okay";

};



&soc {

	qcom,msm-dai-tdm-pri-rx {

		compatible = "qcom,msm-dai-tdm";

		qcom,msm-cpudai-tdm-group-id = <37120>;

		qcom,msm-cpudai-tdm-group-num-ports = <1>;

		qcom,msm-cpudai-tdm-group-port-id = <36864>;

		qcom,msm-cpudai-tdm-clk-rate = <12288000>;

		dai_pri_tdm_rx_0: qcom,msm-dai-q6-tdm-pri-rx-0 {

			compatible = "qcom,msm-dai-q6-tdm";

			qcom,msm-cpudai-tdm-dev-id = <36864>;

			qcom,msm-cpudai-tdm-sync-mode = <0>;

			qcom,msm-cpudai-tdm-sync-src = <1>;

			qcom,msm-cpudai-tdm-data-out = <0>;

			qcom,msm-cpudai-tdm-invert-sync = <0>;

			qcom,msm-cpudai-tdm-data-delay = <1>;

			qcom,msm-cpudai-tdm-data-align = <0>;

		};

	};



	qcom,msm-dai-tdm-pri-tx {

		compatible = "qcom,msm-dai-tdm";

		qcom,msm-cpudai-tdm-group-id = <37121>;

		qcom,msm-cpudai-tdm-group-num-ports = <1>;

		qcom,msm-cpudai-tdm-group-port-id = <36865>;

		qcom,msm-cpudai-tdm-clk-rate = <12288000>;

		dai_pri_tdm_tx_0: qcom,msm-dai-q6-tdm-pri-tx-0 {

			compatible = "qcom,msm-dai-q6-tdm";

			qcom,msm-cpudai-tdm-dev-id = <36865>;

			qcom,msm-cpudai-tdm-sync-mode = <0>;

			qcom,msm-cpudai-tdm-sync-src = <1>;

			qcom,msm-cpudai-tdm-data-out = <0>;

			qcom,msm-cpudai-tdm-invert-sync = <0>;

			qcom,msm-cpudai-tdm-data-delay = <1>;

			qcom,msm-cpudai-tdm-data-align = <0>;

		};

	};



	qcom,msm-dai-tdm-sec-rx {

		compatible = "qcom,msm-dai-tdm";

		qcom,msm-cpudai-tdm-group-id = <37136>;

		qcom,msm-cpudai-tdm-group-num-ports = <1>;

		qcom,msm-cpudai-tdm-group-port-id = <36880>;

		qcom,msm-cpudai-tdm-clk-rate = <12288000>;

		dai_sec_tdm_rx_0: qcom,msm-dai-q6-tdm-sec-rx-0 {

			compatible = "qcom,msm-dai-q6-tdm";

			qcom,msm-cpudai-tdm-dev-id = <36880>;

			qcom,msm-cpudai-tdm-sync-mode = <0>;

			qcom,msm-cpudai-tdm-sync-src = <1>;

			qcom,msm-cpudai-tdm-data-out = <0>;

			qcom,msm-cpudai-tdm-invert-sync = <0>;

			qcom,msm-cpudai-tdm-data-delay = <1>;

			qcom,msm-cpudai-tdm-data-align = <0>;

		};

	};



	qcom,msm-dai-tdm-sec-tx {

		compatible = "qcom,msm-dai-tdm";

		qcom,msm-cpudai-tdm-group-id = <37137>;

		qcom,msm-cpudai-tdm-group-num-ports = <1>;

		qcom,msm-cpudai-tdm-group-port-id = <36881>;

		qcom,msm-cpudai-tdm-clk-rate = <12288000>;

		dai_sec_tdm_tx_0: qcom,msm-dai-q6-tdm-sec-tx-0 {

			compatible = "qcom,msm-dai-q6-tdm";

			qcom,msm-cpudai-tdm-dev-id = <36881>;

			qcom,msm-cpudai-tdm-sync-mode = <0>;

			qcom,msm-cpudai-tdm-sync-src = <1>;

			qcom,msm-cpudai-tdm-data-out = <0>;

			qcom,msm-cpudai-tdm-invert-sync = <0>;

			qcom,msm-cpudai-tdm-data-delay = <1>;

			qcom,msm-cpudai-tdm-data-align = <0>;

		};

	};

};



&tlmm {

	tlmm_gpio_key {

		gpio_key_active: gpio_key_active {

			mux {

				pins = "gpio91", "gpio127", "gpio128";

				function = "gpio";

			};



			config {

				pins = "gpio91", "gpio127", "gpio128";

			};

		};



		gpio_key_suspend: gpio_key_suspend {

			mux {

				pins = "gpio91", "gpio127", "gpio128";

				function = "gpio";

			};



			config {

				pins = "gpio91", "gpio127", "gpio128";

			};

		};

	};

};



&mdss_fb0 {

	/delete-node/ qcom,cont-splash-memory;

};

arch/arm/boot/dts/qcom/apq8017-pmi8937-cdp-wcd-rome.dts

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