Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit f5962330 authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
Browse files

Merge "ASoC: wcd9335: add new clock for 44.1KHz native playback"

parents e0713552 d036befa

Documentation/devicetree/bindings/sound/qcom-audio-dev.txt

+3 −0
Original line number Diff line number Diff line
@@ -565,6 +565,9 @@ Example: 
		clocks = <&clock_rpm clk_div_clk1>;

		qcom,node_has_rpm_clock;

		#clock-cells = <1>;

		pinctrl-names = "sleep", "active";

		pinctrl-0 = <&spkr_i2s_clk_sleep>;

		pinctrl-1 = <&spkr_i2s_clk_active>;

	};



	audio_slimslave {

arch/arm/boot/dts/qcom/msm8996-pinctrl.dtsi

+27 −0
Original line number Diff line number Diff line
@@ -948,6 +948,33 @@ 
			};

		};



		spkr_i2s_clk_pin {

			spkr_i2s_clk_sleep: spkr_i2s_clk_sleep {

				mux {

					pins = "gpio69";

					function = "spkr_i2s";

				};



				config {

					pins = "gpio69";

					drive-strength = <2>; /* 2 mA */

					bias-pull-down;       /* PULL DOWN */

				};

			};

			spkr_i2s_clk_active: spkr_i2s_clk_active {

				mux {

					pins = "gpio69";

					function = "spkr_i2s";

				};



				config {

					pins = "gpio69";

					drive-strength = <8>; /* 8 mA */

					bias-disable;         /* NO PULL */

				};

			};

		};



		cnss_pins {

			cnss_default: cnss_default {

				mux {

arch/arm/boot/dts/qcom/msm8996.dtsi

+6 −2
Original line number Diff line number Diff line
@@ -741,6 +741,9 @@ 
		clocks = <&clock_gcc clk_div_clk1>;

		qcom,node_has_rpm_clock;

		#clock-cells = <1>;

		pinctrl-names = "sleep", "active";

		pinctrl-0 = <&spkr_i2s_clk_sleep>;

		pinctrl-1 = <&spkr_i2s_clk_active>;

	};



	tspp: msm_tspp@075e7000 {
@@ -820,8 +823,9 @@ 


			qcom,cdc-reset-gpio = <&tlmm 64 0>;



			clock-names = "wcd_clk";

			clocks = <&clock_audio clk_audio_pmi_clk>;

			clock-names = "wcd_clk", "wcd_native_clk";

			clocks = <&clock_audio clk_audio_pmi_clk>,

				 <&clock_audio clk_audio_ap_clk2>;



			cdc-vdd-buck-supply = <&pm8994_s4>;

			qcom,cdc-vdd-buck-voltage = <1800000 1800000>;

include/dt-bindings/clock/msm-clocks-8996.h

+1 −0
Original line number Diff line number Diff line
@@ -529,4 +529,5 @@ 
/* Audio External Clocks */

#define clk_audio_ap_clk 0x312ac429

#define clk_audio_pmi_clk 0xb7ba2274

#define clk_audio_ap_clk2 0xf0fbaf5b

#endif

include/sound/apr_audio-v2.h

+3 −0
Original line number Diff line number Diff line
@@ -7431,6 +7431,7 @@ struct afe_param_id_clip_bank_sel { 
#define Q6AFE_LPASS_OSR_CLK_DISABLE		     0x0



/* Supported Bit clock values */

#define Q6AFE_LPASS_IBIT_CLK_11_P2896_MHZ		0xAC4400

#define Q6AFE_LPASS_IBIT_CLK_8_P192_MHZ		0x7D0000

#define Q6AFE_LPASS_IBIT_CLK_6_P144_MHZ		0x5DC000

#define Q6AFE_LPASS_IBIT_CLK_4_P096_MHZ		0x3E8000
@@ -7531,6 +7532,8 @@ enum afe_lpass_clk_mode { 
#define Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_DIVIDEND	0x2

/* Clock attribute for divisor couple case */

#define Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_DIVISOR	0x3

/* Clock set API version */

#define Q6AFE_LPASS_CLK_CONFIG_API_VERSION		0x1



struct afe_clk_set {

	/*