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Commit d036befa authored by Vidyakumar Athota's avatar Vidyakumar Athota
Browse files

ASoC: wcd9335: add new clock for 44.1KHz native playback 



Add support for 11.2896 MHz clock as input to DAC to
support 44.1KHz native playback.

Change-Id: Ieea4081c35c3dcd8a3df2a8a8c29c490730a26fa
Signed-off-by: default avatarVidyakumar Athota <vathota@codeaurora.org>
parent 1310e48a

Documentation/devicetree/bindings/sound/qcom-audio-dev.txt

+3 −0
Original line number Diff line number Diff line
@@ -565,6 +565,9 @@ Example: 
		clocks = <&clock_rpm clk_div_clk1>;

		qcom,node_has_rpm_clock;

		#clock-cells = <1>;

		pinctrl-names = "sleep", "active";

		pinctrl-0 = <&spkr_i2s_clk_sleep>;

		pinctrl-1 = <&spkr_i2s_clk_active>;

	};



	audio_slimslave {

include/sound/apr_audio-v2.h

+3 −0
Original line number Diff line number Diff line
@@ -7431,6 +7431,7 @@ struct afe_param_id_clip_bank_sel { 
#define Q6AFE_LPASS_OSR_CLK_DISABLE		     0x0



/* Supported Bit clock values */

#define Q6AFE_LPASS_IBIT_CLK_11_P2896_MHZ		0xAC4400

#define Q6AFE_LPASS_IBIT_CLK_8_P192_MHZ		0x7D0000

#define Q6AFE_LPASS_IBIT_CLK_6_P144_MHZ		0x5DC000

#define Q6AFE_LPASS_IBIT_CLK_4_P096_MHZ		0x3E8000
@@ -7531,6 +7532,8 @@ enum afe_lpass_clk_mode { 
#define Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_DIVIDEND	0x2

/* Clock attribute for divisor couple case */

#define Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_DIVISOR	0x3

/* Clock set API version */

#define Q6AFE_LPASS_CLK_CONFIG_API_VERSION		0x1



struct afe_clk_set {

	/*

sound/soc/codecs/audio-ext-clk.c

+137 −0
Original line number Diff line number Diff line
@@ -22,6 +22,13 @@ 
#include <linux/gpio.h>

#include <linux/of_gpio.h>

#include <dt-bindings/clock/msm-clocks-8996.h>

#include <sound/q6afe-v2.h>



struct pinctrl_info {

	struct pinctrl *pinctrl;

	struct pinctrl_state *sleep;

	struct pinctrl_state *active;

};



struct audio_ext_ap_clk {

	bool enabled;
@@ -34,6 +41,21 @@ struct audio_ext_pmi_clk { 
	struct clk c;

};



struct audio_ext_ap_clk2 {

	bool enabled;

	struct pinctrl_info pnctrl_info;

	struct clk c;

};



static struct afe_clk_set clk2_config = {

	Q6AFE_LPASS_CLK_CONFIG_API_VERSION,

	Q6AFE_LPASS_CLK_ID_SPEAKER_I2S_OSR,

	Q6AFE_LPASS_IBIT_CLK_11_P2896_MHZ,

	Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,

	Q6AFE_LPASS_CLK_ROOT_DEFAULT,

	0,

};



static inline struct audio_ext_ap_clk *to_audio_ap_clk(struct clk *clk)

{

	return container_of(clk, struct audio_ext_ap_clk, c);
@@ -53,7 +75,53 @@ static void audio_ext_clk_unprepare(struct clk *clk) 


	pr_debug("%s: gpio: %d\n", __func__, audio_clk->gpio);

	gpio_direction_output(audio_clk->gpio, 0);

}



static inline struct audio_ext_ap_clk2 *to_audio_ap_clk2(struct clk *clk)

{

	return container_of(clk, struct audio_ext_ap_clk2, c);

}



static int audio_ext_clk2_prepare(struct clk *clk)

{

	struct audio_ext_ap_clk2 *audio_clk2 = to_audio_ap_clk2(clk);

	struct pinctrl_info *pnctrl_info = &audio_clk2->pnctrl_info;

	int ret;



	ret = pinctrl_select_state(pnctrl_info->pinctrl,

				   pnctrl_info->active);

	if (ret) {

		pr_err("%s: active state select failed with %d\n",

			__func__, ret);

		return -EIO;

	}



	clk2_config.enable = 1;

	ret = afe_set_lpass_clk_cfg(IDX_RSVD_3, &clk2_config);

	if (ret < 0) {

		pr_err("%s: failed to set clock, ret = %d\n", __func__, ret);

		return -EINVAL;

	}



	return 0;

}



static void audio_ext_clk2_unprepare(struct clk *clk)

{

	struct audio_ext_ap_clk2 *audio_clk2 = to_audio_ap_clk2(clk);

	struct pinctrl_info *pnctrl_info = &audio_clk2->pnctrl_info;

	int ret;



	ret = pinctrl_select_state(pnctrl_info->pinctrl,

				   pnctrl_info->sleep);

	if (ret)

		pr_err("%s: sleep state select failed with %d\n",

			__func__, ret);



	clk2_config.enable = 0;

	ret = afe_set_lpass_clk_cfg(IDX_RSVD_3, &clk2_config);

	if (ret < 0)

		pr_err("%s: failed to reset clock, ret = %d\n", __func__, ret);

}



static struct clk_ops audio_ext_ap_clk_ops = {
@@ -61,6 +129,11 @@ static struct clk_ops audio_ext_ap_clk_ops = { 
	.unprepare = audio_ext_clk_unprepare,

};



static struct clk_ops audio_ext_ap_clk2_ops = {

	.prepare = audio_ext_clk2_prepare,

	.unprepare = audio_ext_clk2_unprepare,

};



static struct audio_ext_pmi_clk audio_pmi_clk = {

	.c = {

		.dbg_name = "audio_ext_pmi_clk",
@@ -77,11 +150,63 @@ static struct audio_ext_ap_clk audio_ap_clk = { 
	},

};



static struct audio_ext_ap_clk2 audio_ap_clk2 = {

	.c = {

		.dbg_name = "audio_ext_ap_clk2",

		.ops = &audio_ext_ap_clk2_ops,

		CLK_INIT(audio_ap_clk2.c),

	},

};



static struct clk_lookup audio_ref_clock[] = {

	CLK_LIST(audio_ap_clk),

	CLK_LIST(audio_pmi_clk),

	CLK_LIST(audio_ap_clk2),

};



static int audio_get_pinctrl(struct platform_device *pdev)

{

	struct pinctrl_info *pnctrl_info;

	struct pinctrl *pinctrl;

	int ret;



	pnctrl_info = &audio_ap_clk2.pnctrl_info;

	pnctrl_info->pinctrl = NULL;

	pinctrl = devm_pinctrl_get(&pdev->dev);

	if (IS_ERR_OR_NULL(pinctrl)) {

		dev_dbg(&pdev->dev, "%s: Unable to get pinctrl handle\n",

			__func__);

		return -EINVAL;

	}

	pnctrl_info->pinctrl = pinctrl;

	/* get all state handles from Device Tree */

	pnctrl_info->sleep = pinctrl_lookup_state(pinctrl, "sleep");

	if (IS_ERR(pnctrl_info->sleep)) {

		dev_err(&pdev->dev, "%s: could not get sleep pinstate\n",

			__func__);

		goto err;

	}

	pnctrl_info->active = pinctrl_lookup_state(pinctrl, "active");

	if (IS_ERR(pnctrl_info->active)) {

		dev_err(&pdev->dev, "%s: could not get active pinstate\n",

			__func__);

		goto err;

	}

	/* Reset the TLMM pins to a default state */

	ret = pinctrl_select_state(pnctrl_info->pinctrl,

				   pnctrl_info->sleep);

	if (ret) {

		dev_err(&pdev->dev, "%s: Disable TLMM pins failed with %d\n",

			__func__, ret);

		goto err;

	}

	return 0;



err:

	devm_pinctrl_put(pnctrl_info->pinctrl);

	return -EINVAL;

}



static int audio_ref_clk_probe(struct platform_device *pdev)

{

	int clk_gpio;
@@ -119,6 +244,11 @@ static int audio_ref_clk_probe(struct platform_device *pdev) 
	} else

		audio_ap_clk.gpio = clk_gpio;



	ret = audio_get_pinctrl(pdev);

	if (ret)

		dev_dbg(&pdev->dev, "%s: Parsing pinctrl failed\n",

			__func__);



	ret = of_msm_clock_register(pdev->dev.of_node, audio_ref_clock,

			      ARRAY_SIZE(audio_ref_clock));

	if (ret) {
@@ -138,11 +268,18 @@ err: 


static int audio_ref_clk_remove(struct platform_device *pdev)

{

	struct pinctrl_info *pnctrl_info = &audio_ap_clk2.pnctrl_info;



	if (audio_pmi_clk.gpio > 0)

		gpio_free(audio_pmi_clk.gpio);

	else if (audio_ap_clk.gpio > 0)

		gpio_free(audio_ap_clk.gpio);



	if (pnctrl_info->pinctrl) {

		devm_pinctrl_put(pnctrl_info->pinctrl);

		pnctrl_info->pinctrl = NULL;

	}



	return 0;

}

sound/soc/codecs/wcd9335.c

+12 −1
Original line number Diff line number Diff line
@@ -685,6 +685,7 @@ struct tasha_priv { 
	struct mutex micb_lock;



	struct clk *wcd_ext_clk;

	struct clk *wcd_native_clk;

	struct mutex swr_read_lock;

	struct mutex swr_write_lock;

	struct mutex swr_clk_lock;
@@ -11019,7 +11020,7 @@ static int tasha_probe(struct platform_device *pdev) 
{

	int ret = 0;

	struct tasha_priv *tasha;

	struct clk *wcd_ext_clk;

	struct clk *wcd_ext_clk, *wcd_native_clk;

	struct wcd9xxx_resmgr_v2 *resmgr;

	struct wcd9xxx_power_region *cdc_pwr;
@@ -11091,6 +11092,14 @@ static int tasha_probe(struct platform_device *pdev) 
		goto resmgr_remove;

	}

	tasha->wcd_ext_clk = wcd_ext_clk;



	/* Register native clk for 44.1 playback */

	wcd_native_clk = clk_get(tasha->wcd9xxx->dev, "wcd_native_clk");

	if (IS_ERR(wcd_native_clk))

		dev_dbg(tasha->wcd9xxx->dev, "%s: clk get %s failed\n",

			__func__, "wcd_native_clk");

	else

		tasha->wcd_native_clk = wcd_native_clk;

	/* Update codec register default values */

	tasha_update_reg_defaults(tasha);

	schedule_work(&tasha->swr_add_devices_work);
@@ -11115,6 +11124,8 @@ static int tasha_remove(struct platform_device *pdev) 
	tasha = platform_get_drvdata(pdev);



	clk_put(tasha->wcd_ext_clk);

	if (tasha->wcd_native_clk)

		clk_put(tasha->wcd_native_clk);

	devm_kfree(&pdev->dev, tasha);

	snd_soc_unregister_codec(&pdev->dev);

	return 0;