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Commit 1310e48a authored by Vidyakumar Athota's avatar Vidyakumar Athota Committed by Gerrit - the friendly Code Review server
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ARM: dts: msm: add new clk for native playback on 8996 



MSM GPIO 69 is used as a clock for native playback
on msm8996. Add the GPIO 69 configuration along with
pinctrl information.

Change-Id: Ie6c8fe44809d27a83d0fef6a46f23e9969422ed9
Signed-off-by: default avatarVidyakumar Athota <vathota@codeaurora.org>
parent 4a0b6988

arch/arm/boot/dts/qcom/msm8996-pinctrl.dtsi

+27 −0
Original line number Diff line number Diff line
@@ -948,6 +948,33 @@ 
			};

		};



		spkr_i2s_clk_pin {

			spkr_i2s_clk_sleep: spkr_i2s_clk_sleep {

				mux {

					pins = "gpio69";

					function = "spkr_i2s";

				};



				config {

					pins = "gpio69";

					drive-strength = <2>; /* 2 mA */

					bias-pull-down;       /* PULL DOWN */

				};

			};

			spkr_i2s_clk_active: spkr_i2s_clk_active {

				mux {

					pins = "gpio69";

					function = "spkr_i2s";

				};



				config {

					pins = "gpio69";

					drive-strength = <8>; /* 8 mA */

					bias-disable;         /* NO PULL */

				};

			};

		};



		cnss_pins {

			cnss_default: cnss_default {

				mux {

arch/arm/boot/dts/qcom/msm8996.dtsi

+6 −2
Original line number Diff line number Diff line
@@ -741,6 +741,9 @@ 
		clocks = <&clock_gcc clk_div_clk1>;

		qcom,node_has_rpm_clock;

		#clock-cells = <1>;

		pinctrl-names = "sleep", "active";

		pinctrl-0 = <&spkr_i2s_clk_sleep>;

		pinctrl-1 = <&spkr_i2s_clk_active>;

	};



	tspp: msm_tspp@075e7000 {
@@ -820,8 +823,9 @@ 


			qcom,cdc-reset-gpio = <&tlmm 64 0>;



			clock-names = "wcd_clk";

			clocks = <&clock_audio clk_audio_pmi_clk>;

			clock-names = "wcd_clk", "wcd_native_clk";

			clocks = <&clock_audio clk_audio_pmi_clk>,

				 <&clock_audio clk_audio_ap_clk2>;



			cdc-vdd-buck-supply = <&pm8994_s4>;

			qcom,cdc-vdd-buck-voltage = <1800000 1800000>;

include/dt-bindings/clock/msm-clocks-8996.h

+1 −0
Original line number Diff line number Diff line
@@ -526,4 +526,5 @@ 
/* Audio External Clocks */

#define clk_audio_ap_clk 0x312ac429

#define clk_audio_pmi_clk 0xb7ba2274

#define clk_audio_ap_clk2 0xf0fbaf5b

#endif