ARM: dts: msm: Update with correct SID for LPASS on msm8996

SID entries 13 to 15 are reserved and only entries from 5 to 12
are assigned for compute tasks. Trying to use SID entries from
13 to 15 when mapping the entries in SMMU could result in faults.
Update the device tree entries to use the correct set of SIDs.

Change-Id: I0033985f0a786fd4df19a1d83715781b2d5d0bd6
Signed-off-by: Sathish Ambley <sathishambley@codeaurora.org>