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Commit f060f855 authored by Mitchel Humpherys's avatar Mitchel Humpherys Committed by Matt Wagantall
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iommu/arm-smmu: use "no-sign" SEP value



Currently, we program the TCR2.SEP to be equal to the input address
size.  This makes it impossible to use the top bit of the input address
space since that causes TTBR1 to be selected, which we don't program or
use.  Since we don't even use sign-extended addresses, fix this by
always using the "no-sign" value for TCR2.SEP as specified by the ARM
SMMUv2 spec.

Change-Id: I9155b62fe59c66185c6b9fba7f8bba8798b45785
Signed-off-by: default avatarMitchel Humpherys <mitchelh@codeaurora.org>
parent e3432593
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+2 −21
Original line number Diff line number Diff line
@@ -315,6 +315,7 @@
#define TTBCR2_SEP_41			3
#define TTBCR2_SEP_43			4
#define TTBCR2_SEP_47			5
#define TTBCR2_SEP_NOSIGN		7

#define TTBRn_HI_ASID_SHIFT		16

@@ -965,27 +966,7 @@ static void arm_smmu_init_context_bank(struct arm_smmu_domain *smmu_domain)
			       gr1_base + ARM_SMMU_GR1_CBA2R(cfg->cbndx));

		/* TTBCR2 */
		switch (smmu->s1_input_size) {
		case 32:
			reg = (TTBCR2_SEP_31 << TTBCR2_SEP_SHIFT);
			break;
		case 36:
			reg = (TTBCR2_SEP_35 << TTBCR2_SEP_SHIFT);
			break;
		case 39:
		case 40:
			reg = (TTBCR2_SEP_39 << TTBCR2_SEP_SHIFT);
			break;
		case 42:
			reg = (TTBCR2_SEP_41 << TTBCR2_SEP_SHIFT);
			break;
		case 44:
			reg = (TTBCR2_SEP_43 << TTBCR2_SEP_SHIFT);
			break;
		case 48:
			reg = (TTBCR2_SEP_47 << TTBCR2_SEP_SHIFT);
			break;
		}
		reg = (TTBCR2_SEP_NOSIGN << TTBCR2_SEP_SHIFT);

		switch (smmu->s1_output_size) {
		case 32: