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Commit ee2f3993 authored by Sunid Wilson's avatar Sunid Wilson
Browse files

ARM: dts: msm: Add MMU prefetch register configuration for JPEG on 8996



Add register configuration in dtsi to enable MMU prefetch and set
prefetch filters for JPEG encoder, decoder and DMA.

Change-Id: I80ad5eae348a6dabd210c8ac4cdf67e518490d65
Signed-off-by: default avatarSunid Wilson <sunidw@codeaurora.org>
parent c4ba3a8a
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+13 −0
Original line number Diff line number Diff line
@@ -480,6 +480,11 @@
			<&clock_mmss clk_mmagic_camss_axi_clk>;
		qcom,clock-rates = <320000000 0 0 0 0 0 0 0 0>;
		qcom,vbif-reg-settings = <0x4 0x1>;
		qcom,prefetch-reg-settings = <0x30c 0x1111>,
			<0x318 0x31>,
			<0x324 0x31>,
			<0x330 0x31>,
			<0x33c 0x0>;
		status = "ok";
	};

@@ -510,6 +515,11 @@
			<&clock_mmss clk_mmagic_camss_axi_clk>;
		qcom,clock-rates = <266670000 0 0 0 0 0 0 0 0>;
		qcom,vbif-reg-settings = <0x4 0x1>;
		qcom,prefetch-reg-settings = <0x30c 0x1111>,
			<0x318 0x0>,
			<0x324 0x31>,
			<0x330 0x31>,
			<0x33c 0x31>;
		status = "ok";
	};

@@ -540,6 +550,9 @@
			<&clock_mmss clk_mmagic_camss_axi_clk>;
		qcom,clock-rates = <266670000 0 0 0 0 0 0 0 0>;
		qcom,vbif-reg-settings = <0x4 0x1>;
		qcom,prefetch-reg-settings = <0x18c 0x11>,
			<0x1a0 0x31>,
			<0x1b0 0x31>;
		status = "ok";
	};