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Commit c4ba3a8a authored by Sunid Wilson's avatar Sunid Wilson
Browse files

msm: jpeg: Add MMU prefetch to JPEG driver 



On JPEG driver, enable MMU prefetch, set prefetch filters and
set min/max buffer addresses on a per frame basis.

Change-Id: I0e189fb48741ab7794ad0117b0cb1b4e41d306ff
Signed-off-by: default avatarSunid Wilson <sunidw@codeaurora.org>
parent 3bc72a9c

Documentation/devicetree/bindings/media/video/msm-jpeg.txt

+15 −0
Original line number Diff line number Diff line
@@ -21,6 +21,8 @@ Required properties: 
Optional properties:

- qcom,vbif-reg-settings: relative address offsets and value pairs for VBIF registers.

- qcom,qos-reg-settings: relative address offsets and value pairs for QoS registers.

- qcom,prefetch-reg-settings: relative address offsets and value pairs for

  MMU prefetch registers.



Example:
@@ -54,6 +56,11 @@ Example: 
			<0xb0 0x00100010>,

			<0xc0 0x10001000>;

		qcom,qos-reg-settings = <0x28 0x00000008>;

		qcom,prefetch-reg-settings = <0x30c 0x1111>,

			<0x318 0x31>,

			<0x324 0x31>,

			<0x330 0x31>,

			<0x33c 0x0>;

		status = "ok";

	};
@@ -87,6 +94,11 @@ Example: 
			<0xb0 0x00100010>,

			<0xc0 0x10001000>;

		qcom,qos-reg-settings = <0x28 0x00000008>;

		qcom,prefetch-reg-settings = <0x30c 0x1111>,

			<0x318 0x0>,

			<0x324 0x31>,

			<0x330 0x31>,

			<0x33c 0x31>;

		status = "ok";

	};
@@ -120,6 +132,9 @@ Example: 
			<0xb0 0x00100010>,

			<0xc0 0x10001000>;

		qcom,qos-reg-settings = <0x28 0x00000008>;

		qcom,prefetch-reg-settings = <0x18c 0x11>,

			<0x1a0 0x31>,

			<0x1b0 0x31>;

		status = "ok";

	};

drivers/media/platform/msm/camera_v2/jpeg_10/msm_jpeg_core.c

+26 −6
Original line number Diff line number Diff line
@@ -83,17 +83,30 @@ int msm_jpeg_core_fe_start(struct msm_jpeg_device *pgmn_dev) 
int msm_jpeg_core_fe_buf_update(struct msm_jpeg_device *pgmn_dev,

	struct msm_jpeg_core_buf *buf)

{

	int rc = 0;

	if (0 == buf->cbcr_len)

		buf->cbcr_buffer_addr = 0x0;



	JPEG_DBG("%s:%d] 0x%08x %d 0x%08x %d\n", __func__, __LINE__,

		(int) buf->y_buffer_addr, buf->y_len,

		(int) buf->cbcr_buffer_addr, buf->cbcr_len);

	if (pgmn_dev->core_type == MSM_JPEG_CORE_CODEC)

		return msm_jpeg_hw_pingpong_update(&pgmn_dev->fe_pingpong_buf,



	if (pgmn_dev->core_type == MSM_JPEG_CORE_CODEC) {

		rc = msm_jpeg_hw_pingpong_update(&pgmn_dev->fe_pingpong_buf,

			buf, pgmn_dev->base);

	else

		return msm_jpegdma_hw_pingpong_update(

		if (rc < 0)

			return rc;

		msm_jpeg_hw_fe_mmu_prefetch(buf, pgmn_dev->base,

			pgmn_dev->decode_flag);

	} else {

		rc = msm_jpegdma_hw_pingpong_update(

			&pgmn_dev->fe_pingpong_buf, buf, pgmn_dev->base);

		if (rc < 0)

			return rc;

		msm_jpegdma_hw_fe_mmu_prefetch(buf, pgmn_dev->base);

	}



	return rc;

}



void *msm_jpeg_core_fe_pingpong_irq(int jpeg_irq_status,
@@ -105,17 +118,24 @@ void *msm_jpeg_core_fe_pingpong_irq(int jpeg_irq_status, 
/* write engine */

int msm_jpeg_core_we_buf_update(struct msm_jpeg_device *pgmn_dev,

	struct msm_jpeg_core_buf *buf) {



	JPEG_DBG("%s:%d] 0x%08x 0x%08x %d\n", __func__, __LINE__,

		(int) buf->y_buffer_addr, (int) buf->cbcr_buffer_addr,

		buf->y_len);



	pgmn_dev->we_pingpong_buf.buf[0] = *buf;

	pgmn_dev->we_pingpong_buf.buf_status[0] = 1;

	if (pgmn_dev->core_type == MSM_JPEG_CORE_CODEC)



	if (pgmn_dev->core_type == MSM_JPEG_CORE_CODEC) {

		msm_jpeg_hw_we_buffer_update(

			&pgmn_dev->we_pingpong_buf.buf[0], 0, pgmn_dev->base);

	else

		msm_jpeg_hw_we_mmu_prefetch(buf, pgmn_dev->base,

			pgmn_dev->decode_flag);

	} else {

		msm_jpegdma_hw_we_buffer_update(

			&pgmn_dev->we_pingpong_buf.buf[0], 0, pgmn_dev->base);

		msm_jpegdma_hw_we_mmu_prefetch(buf, pgmn_dev->base);

	}



	return 0;

}

drivers/media/platform/msm/camera_v2/jpeg_10/msm_jpeg_hw.c

+319 −1
Original line number Diff line number Diff line 
/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.

/* Copyright (c) 2012-2015, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and
@@ -388,6 +388,322 @@ void msm_jpegdma_hw_we_buffer_update(struct msm_jpeg_hw_buf *p_input, 
	wmb();

}



struct msm_jpeg_hw_cmd hw_cmd_fe_mmu_prefetch[] = {

	/* type, repeat n times, offset, mask, data or pdata */

	{MSM_JPEG_HW_CMD_TYPE_WRITE, 1, MSM_JPEG_S0_MMU_PF_ADDR_MIN,

		MSM_JPEG_S0_MMU_PF_ADDR_MIN_BMSK, {0} },

	{MSM_JPEG_HW_CMD_TYPE_WRITE, 1, MSM_JPEG_S0_MMU_PF_ADDR_MAX,

		MSM_JPEG_S0_MMU_PF_ADDR_MAX_BMSK, {0} },

	{MSM_JPEG_HW_CMD_TYPE_WRITE, 1, MSM_JPEG_S1_MMU_PF_ADDR_MIN,

		MSM_JPEG_S1_MMU_PF_ADDR_MIN_BMSK, {0} },

	{MSM_JPEG_HW_CMD_TYPE_WRITE, 1, MSM_JPEG_S1_MMU_PF_ADDR_MAX,

		MSM_JPEG_S1_MMU_PF_ADDR_MAX_BMSK, {0} },

	{MSM_JPEG_HW_CMD_TYPE_WRITE, 1, MSM_JPEG_S2_MMU_PF_ADDR_MIN,

		MSM_JPEG_S2_MMU_PF_ADDR_MIN_BMSK, {0} },

	{MSM_JPEG_HW_CMD_TYPE_WRITE, 1, MSM_JPEG_S2_MMU_PF_ADDR_MAX,

		MSM_JPEG_S2_MMU_PF_ADDR_MAX_BMSK, {0} },

};



/*

 * msm_jpeg_hw_fe_mmu_prefetch() - writes fe min/max addrs for each plane to

 * MMU prefetch registers.

 * @buf: Pointer to jpeg hw buffer.

 * @base: Pointer to base address.

 * @decode_flag: Jpeg decode flag.

 *

 * This function writes fe min/max address for each plane to MMU prefetch

 * registers, MMU prefetch hardware will only prefetch address translations

 * within this min/max boundary.

 *

 * Return: None.

 */

void msm_jpeg_hw_fe_mmu_prefetch(struct msm_jpeg_hw_buf *buf, void *base,

	uint8_t decode_flag)

{

	struct msm_jpeg_hw_cmd *hw_cmd_p;

	struct msm_jpeg_hw_cmd tmp_hw_cmd;



	hw_cmd_p = &hw_cmd_fe_mmu_prefetch[0];

	tmp_hw_cmd = *hw_cmd_p++;

	tmp_hw_cmd.data = buf->y_buffer_addr;



	JPEG_DBG("%s:%d: MIN y_buf_addr %08x\n",

		__func__, __LINE__, tmp_hw_cmd.data);



	/* ensure write is done */

	wmb();

	msm_jpeg_hw_write(&tmp_hw_cmd, base);



	tmp_hw_cmd = *hw_cmd_p++;

	tmp_hw_cmd.data = buf->y_buffer_addr;

	if (buf->y_len)

		tmp_hw_cmd.data += buf->y_len - 1;



	JPEG_DBG("%s:%d: MAX y_buf_addr %08x, y_len %d\n",

		__func__, __LINE__, tmp_hw_cmd.data, buf->y_len);



	msm_jpeg_hw_write(&tmp_hw_cmd, base);



	if (!decode_flag) {

		tmp_hw_cmd = *hw_cmd_p++;

		tmp_hw_cmd.data = buf->cbcr_buffer_addr;



		JPEG_DBG("%s:%d: MIN cbcr_buf_addr %08x\n",

			__func__, __LINE__, tmp_hw_cmd.data);



		msm_jpeg_hw_write(&tmp_hw_cmd, base);



		tmp_hw_cmd = *hw_cmd_p++;

		tmp_hw_cmd.data = buf->cbcr_buffer_addr;

		if (buf->cbcr_len)

			tmp_hw_cmd.data	+= buf->cbcr_len - 1;



		JPEG_DBG("%s:%d: MAX cbcr_buf_addr %08x, cbcr_len %d\n"

			, __func__, __LINE__, tmp_hw_cmd.data, buf->cbcr_len);



		msm_jpeg_hw_write(&tmp_hw_cmd, base);



		tmp_hw_cmd = *hw_cmd_p++;

		tmp_hw_cmd.data = buf->pln2_addr;



		JPEG_DBG("%s:%d: MIN pln2_buf_addr %08x\n",

			__func__, __LINE__, tmp_hw_cmd.data);



		msm_jpeg_hw_write(&tmp_hw_cmd, base);



		tmp_hw_cmd = *hw_cmd_p++;

		tmp_hw_cmd.data = buf->pln2_addr;

		if (buf->pln2_len)

			tmp_hw_cmd.data += buf->pln2_len - 1;



		JPEG_DBG("%s:%d: MAX pln2_buf_addr %08x, pln2_len %d\n"

			, __func__, __LINE__, tmp_hw_cmd.data, buf->pln2_len);



		msm_jpeg_hw_write(&tmp_hw_cmd, base);

	}

	/* ensure write is done */

	wmb();

}



struct msm_jpeg_hw_cmd hw_cmd_we_mmu_prefetch[] = {

	/* type, repeat n times, offset, mask, data or pdata */

	{MSM_JPEG_HW_CMD_TYPE_WRITE, 1, MSM_JPEG_S1_MMU_PF_ADDR_MIN,

		MSM_JPEG_S1_MMU_PF_ADDR_MIN_BMSK, {0} },

	{MSM_JPEG_HW_CMD_TYPE_WRITE, 1, MSM_JPEG_S1_MMU_PF_ADDR_MAX,

		MSM_JPEG_S1_MMU_PF_ADDR_MAX_BMSK, {0} },

	{MSM_JPEG_HW_CMD_TYPE_WRITE, 1, MSM_JPEG_S2_MMU_PF_ADDR_MIN,

		MSM_JPEG_S2_MMU_PF_ADDR_MIN_BMSK, {0} },

	{MSM_JPEG_HW_CMD_TYPE_WRITE, 1, MSM_JPEG_S2_MMU_PF_ADDR_MAX,

		MSM_JPEG_S2_MMU_PF_ADDR_MAX_BMSK, {0} },

	{MSM_JPEG_HW_CMD_TYPE_WRITE, 1, MSM_JPEG_S3_MMU_PF_ADDR_MIN,

		MSM_JPEG_S3_MMU_PF_ADDR_MIN_BMSK, {0} },

	{MSM_JPEG_HW_CMD_TYPE_WRITE, 1, MSM_JPEG_S3_MMU_PF_ADDR_MAX,

		MSM_JPEG_S3_MMU_PF_ADDR_MAX_BMSK, {0} },

};



/*

 * msm_jpeg_hw_we_mmu_prefetch() - write we min/max addrs for each plane to

 * MMU prefetch registers.

 * @buf: Pointer to jpeg hw buffer.

 * @base: Pointer to base address.

 * @decode_flag: Jpeg decode flag.

 *

 * This function writes we min/max address for each plane to MMU prefetch

 * registers, MMU prefetch hardware will only prefetch address translations

 * within this min/max boundary.

 *

 * Return: None.

 */

void msm_jpeg_hw_we_mmu_prefetch(struct msm_jpeg_hw_buf *buf, void *base,

	uint8_t decode_flag)

{

	struct msm_jpeg_hw_cmd *hw_cmd_p;

	struct msm_jpeg_hw_cmd tmp_hw_cmd;



	hw_cmd_p = &hw_cmd_we_mmu_prefetch[0];



	/* ensure write is done */

	wmb();

	if (decode_flag) {

		tmp_hw_cmd = *hw_cmd_p++;

		tmp_hw_cmd.data = buf->y_buffer_addr;



		JPEG_DBG("%s:%d: MIN y_buf_addr %08x\n",

			__func__, __LINE__, tmp_hw_cmd.data);



		msm_jpeg_hw_write(&tmp_hw_cmd, base);



		tmp_hw_cmd = *hw_cmd_p++;

		tmp_hw_cmd.data = buf->y_buffer_addr;

		if (buf->y_len)

			tmp_hw_cmd.data += buf->y_len - 1;



		JPEG_DBG("%s:%d: MAX y_buf_addr %08x, y_len %d\n",

			__func__, __LINE__, tmp_hw_cmd.data, buf->y_len);



		msm_jpeg_hw_write(&tmp_hw_cmd, base);



		tmp_hw_cmd = *hw_cmd_p++;

		tmp_hw_cmd.data = buf->cbcr_buffer_addr;



		JPEG_DBG("%s:%d: MIN cbcr_buf_addr %08x\n",

			__func__, __LINE__, tmp_hw_cmd.data);



		msm_jpeg_hw_write(&tmp_hw_cmd, base);



		tmp_hw_cmd = *hw_cmd_p++;

		tmp_hw_cmd.data = buf->cbcr_buffer_addr;

		if (buf->cbcr_len)

			tmp_hw_cmd.data += buf->cbcr_len - 1;



		JPEG_DBG("%s:%d: MAX cbcr_buf_addr %08x, cbcr_len %d\n"

			, __func__, __LINE__, tmp_hw_cmd.data, buf->cbcr_len);



		msm_jpeg_hw_write(&tmp_hw_cmd, base);



		tmp_hw_cmd = *hw_cmd_p++;

		tmp_hw_cmd.data = buf->pln2_addr;



		JPEG_DBG("%s:%d: MIN pln2_buf_addr %08x\n",

			__func__, __LINE__, tmp_hw_cmd.data);



		msm_jpeg_hw_write(&tmp_hw_cmd, base);



		tmp_hw_cmd = *hw_cmd_p++;

		tmp_hw_cmd.data = buf->pln2_addr;

		if (buf->pln2_len)

			tmp_hw_cmd.data += buf->pln2_len - 1;



		JPEG_DBG("%s:%d: MIN pln2_buf_addr %08x, pln2_len %d\n"

			, __func__, __LINE__, tmp_hw_cmd.data, buf->pln2_len);



		msm_jpeg_hw_write(&tmp_hw_cmd, base);

	} else {

		hw_cmd_p += 4;

		tmp_hw_cmd = *hw_cmd_p++;

		tmp_hw_cmd.data = buf->y_buffer_addr;



		JPEG_DBG("%s:%d: MIN y_buf_addr %08x\n",

			__func__, __LINE__, tmp_hw_cmd.data);



		msm_jpeg_hw_write(&tmp_hw_cmd, base);



		tmp_hw_cmd = *hw_cmd_p++;

		tmp_hw_cmd.data = buf->y_buffer_addr;

		if (buf->y_len)

			tmp_hw_cmd.data += buf->y_len - 1;



		JPEG_DBG("%s:%d: MAX y_buf_addr %08x, y_len %d\n",

			__func__, __LINE__, tmp_hw_cmd.data, buf->y_len);



		msm_jpeg_hw_write(&tmp_hw_cmd, base);

	}

	/* ensure write is done */

	wmb();

}



struct msm_jpeg_hw_cmd hw_dma_cmd_fe_mmu_prefetch[] = {

	/* type, repeat n times, offset, mask, data or pdata */

	{MSM_JPEG_HW_CMD_TYPE_WRITE, 1, MSM_JPEGDMA_S0_MMU_PF_ADDR_MIN,

		MSM_JPEGDMA_S0_MMU_PF_ADDR_MIN_BMSK, {0} },

	{MSM_JPEG_HW_CMD_TYPE_WRITE, 1, MSM_JPEGDMA_S0_MMU_PF_ADDR_MAX,

		MSM_JPEGDMA_S0_MMU_PF_ADDR_MAX_BMSK, {0} },

};



/*

 * msm_jpegdma_hw_fe_mmu_prefetch() - write DMA fe min/max addrs to

 * MMU prefetch registers.

 * @buf: Pointer to jpeg hw buffer.

 * @base: Pointer to base address.

 *

 * This function writes DMA fe min/max address for each plane to MMU prefetch

 * registers, MMU prefetch hardware will only prefetch address translations

 * with in this min/max boundary.

 *

 * Return: None.

 */

void msm_jpegdma_hw_fe_mmu_prefetch(struct msm_jpeg_hw_buf *buf, void *base)

{

	struct msm_jpeg_hw_cmd *hw_cmd_p;

	struct msm_jpeg_hw_cmd tmp_hw_cmd;



	hw_cmd_p = &hw_dma_cmd_fe_mmu_prefetch[0];



	tmp_hw_cmd = *hw_cmd_p++;

	tmp_hw_cmd.data = buf->y_buffer_addr;



	JPEG_DBG("%s:%d: MIN DMA addr %08x , reg offset %08x\n",

		__func__, __LINE__, tmp_hw_cmd.data, tmp_hw_cmd.offset);



	/* ensure write is done */

	wmb();

	msm_jpeg_hw_write(&tmp_hw_cmd, base);



	tmp_hw_cmd = *hw_cmd_p++;

	tmp_hw_cmd.data = buf->y_buffer_addr;

	if (buf->y_len)

		tmp_hw_cmd.data += buf->y_len - 1;



	JPEG_DBG("%s:%d: MAX DMA addr %08x , reg offset %08x , length %d\n",

		__func__, __LINE__, tmp_hw_cmd.data, tmp_hw_cmd.offset,

		buf->y_len);



	msm_jpeg_hw_write(&tmp_hw_cmd, base);

	/* ensure write is done */

	wmb();

}



struct msm_jpeg_hw_cmd hw_dma_cmd_we_mmu_prefetch[] = {

	/* type, repeat n times, offset, mask, data or pdata */

	{MSM_JPEG_HW_CMD_TYPE_WRITE, 1, MSM_JPEGDMA_S1_MMU_PF_ADDR_MIN,

		MSM_JPEGDMA_S1_MMU_PF_ADDR_MIN_BMSK, {0} },

	{MSM_JPEG_HW_CMD_TYPE_WRITE, 1, MSM_JPEGDMA_S1_MMU_PF_ADDR_MAX,

		MSM_JPEGDMA_S1_MMU_PF_ADDR_MAX_BMSK, {0} },

};



/*

 * msm_jpegdma_hw_we_mmu_prefetch() - write DMA we min/max addrs to

 * MMU prefetch registers.

 * @buf: Pointer to jpeg hw buffer.

 * @base: Pointer to base address.

 *

 * This function writes DMA we min/max address for each plane to MMU prefetch

 * registers, MMU prefetch hardware will only prefetch address translations

 * with in this min/max boundary.

 *

 * Return: None.

 */

void msm_jpegdma_hw_we_mmu_prefetch(struct msm_jpeg_hw_buf *buf, void *base)

{

	struct msm_jpeg_hw_cmd *hw_cmd_p;

	struct msm_jpeg_hw_cmd tmp_hw_cmd;



	hw_cmd_p = &hw_dma_cmd_we_mmu_prefetch[0];



	tmp_hw_cmd = *hw_cmd_p++;

	tmp_hw_cmd.data = buf->y_buffer_addr;



	JPEG_DBG("%s:%d: MIN DMA addr %08x , reg offset %08x\n",

		__func__, __LINE__, tmp_hw_cmd.data, tmp_hw_cmd.offset);



	/* ensure write is done */

	wmb();

	msm_jpeg_hw_write(&tmp_hw_cmd, base);



	tmp_hw_cmd = *hw_cmd_p++;

	tmp_hw_cmd.data = buf->y_buffer_addr;

	if (buf->y_len)

		tmp_hw_cmd.data += buf->y_len - 1;



	JPEG_DBG("%s:%d: MAX DMA addr %08x , reg offset %08x , length %d\n",

		__func__, __LINE__, tmp_hw_cmd.data, tmp_hw_cmd.offset,

		buf->y_len);



	msm_jpeg_hw_write(&tmp_hw_cmd, base);

	/* ensure write is done */

	wmb();

}



struct msm_jpeg_hw_cmd hw_cmd_reset[] = {

	/* type, repeat n times, offset, mask, data or pdata */

	{MSM_JPEG_HW_CMD_TYPE_WRITE, 1, JPEG_IRQ_MASK_ADDR,
@@ -488,6 +804,8 @@ void msm_jpeg_hw_write(struct msm_jpeg_hw_cmd *hw_cmd_p, 


	new_data = hw_cmd_p->data & hw_cmd_p->mask;

	new_data |= old_data;

	JPEG_DBG("%s:%d] %p %08x\n", __func__, __LINE__,

		paddr, new_data);

	writel_relaxed(new_data, paddr);

}

drivers/media/platform/msm/camera_v2/jpeg_10/msm_jpeg_hw.h

+7 −0
Original line number Diff line number Diff line
@@ -115,6 +115,13 @@ void msm_jpegdma_hw_we_buffer_update(struct msm_jpeg_hw_buf *p_input, 


void msm_jpeg_hw_we_buffer_cfg(uint8_t is_realtime);



void msm_jpeg_hw_fe_mmu_prefetch(struct msm_jpeg_hw_buf *buf, void *,

	uint8_t decode_flag);

void msm_jpeg_hw_we_mmu_prefetch(struct msm_jpeg_hw_buf *buf, void *,

	uint8_t decode_flag);

void msm_jpegdma_hw_fe_mmu_prefetch(struct msm_jpeg_hw_buf *buf, void *);

void msm_jpegdma_hw_we_mmu_prefetch(struct msm_jpeg_hw_buf *buf, void *);



void msm_jpeg_hw_fe_start(void *);

void msm_jpeg_hw_clk_cfg(void);

drivers/media/platform/msm/camera_v2/jpeg_10/msm_jpeg_hw_reg.h

+36 −0
Original line number Diff line number Diff line
@@ -104,6 +104,30 @@ 
#define JPEG_IRQ_STATUS_ADDR (JPEG_REG_BASE + 0x00000020)

#define JPEG_IRQ_STATUS_BMSK 0xFFFFFFFF



#define MSM_JPEG_S0_MMU_PF_ADDR_MIN (JPEG_REG_BASE + 0x00000310)

#define MSM_JPEG_S0_MMU_PF_ADDR_MIN_BMSK 0xFFFFFFFF



#define MSM_JPEG_S0_MMU_PF_ADDR_MAX (JPEG_REG_BASE + 0x00000314)

#define MSM_JPEG_S0_MMU_PF_ADDR_MAX_BMSK 0xFFFFFFFF



#define MSM_JPEG_S1_MMU_PF_ADDR_MIN (JPEG_REG_BASE + 0x0000031C)

#define MSM_JPEG_S1_MMU_PF_ADDR_MIN_BMSK 0xFFFFFFFF



#define MSM_JPEG_S1_MMU_PF_ADDR_MAX (JPEG_REG_BASE + 0x00000320)

#define MSM_JPEG_S1_MMU_PF_ADDR_MAX_BMSK 0xFFFFFFFF



#define MSM_JPEG_S2_MMU_PF_ADDR_MIN (JPEG_REG_BASE + 0x00000328)

#define MSM_JPEG_S2_MMU_PF_ADDR_MIN_BMSK 0xFFFFFFFF



#define MSM_JPEG_S2_MMU_PF_ADDR_MAX (JPEG_REG_BASE + 0x0000032C)

#define MSM_JPEG_S2_MMU_PF_ADDR_MAX_BMSK 0xFFFFFFFF



#define MSM_JPEG_S3_MMU_PF_ADDR_MIN (JPEG_REG_BASE + 0x00000334)

#define MSM_JPEG_S3_MMU_PF_ADDR_MIN_BMSK 0xFFFFFFFF



#define MSM_JPEG_S3_MMU_PF_ADDR_MAX (JPEG_REG_BASE + 0x00000338)

#define MSM_JPEG_S3_MMU_PF_ADDR_MAX_BMSK 0xFFFFFFFF



#define JPEG_ENCODE_OUTPUT_SIZE_STATUS_ADDR (JPEG_REG_BASE + 0x00000180)

#define JPEG_ENCODE_OUTPUT_SIZE_STATUS_BMSK 0x1FFFFFFF
@@ -171,4 +195,16 @@ 
#define MSM_JPEGDMA_WE_0_WR_PNTR (JPEG_REG_BASE + 0x000000BC)

#define MSM_JPEGDMA_WE_1_WR_PNTR (JPEG_REG_BASE + 0x000000EC)



#define MSM_JPEGDMA_S0_MMU_PF_ADDR_MIN (JPEG_REG_BASE + 0x00000190)

#define MSM_JPEGDMA_S0_MMU_PF_ADDR_MIN_BMSK 0xFFFFFFFF



#define MSM_JPEGDMA_S0_MMU_PF_ADDR_MAX (JPEG_REG_BASE + 0x00000198)

#define MSM_JPEGDMA_S0_MMU_PF_ADDR_MAX_BMSK 0xFFFFFFFF



#define MSM_JPEGDMA_S1_MMU_PF_ADDR_MIN (JPEG_REG_BASE + 0x000001A4)

#define MSM_JPEGDMA_S1_MMU_PF_ADDR_MIN_BMSK 0xFFFFFFFF



#define MSM_JPEGDMA_S1_MMU_PF_ADDR_MAX (JPEG_REG_BASE + 0x000001AC)

#define MSM_JPEGDMA_S1_MMU_PF_ADDR_MAX_BMSK 0xFFFFFFFF



#endif /* MSM_JPEG_HW_REG_H */