Merge "ARM: dts: msm: add pinctrl support for display on msmgold" (e9e9ff2f) · Commits · e / devices / android_kernel_xiaomi_markw

arch/arm/boot/dts/qcom/msmgold-mdss-pll.dtsi

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		/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
		*
		* This program is free software; you can redistribute it and/or modify
		* it under the terms of the GNU General Public License version 2 and
		* only version 2 as published by the Free Software Foundation.
		*
		* This program is distributed in the hope that it will be useful,
		* but WITHOUT ANY WARRANTY; without even the implied warranty of
		* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
		* GNU General Public License for more details.
		*/

		#include "msm8937-mdss-pll.dtsi"

		&mdss_dsi0_pll {
		vddio-supply = <&pmgold_l6>;
		};
		/delete-node/ &mdss_dsi1_pll;

arch/arm/boot/dts/qcom/msmgold-mdss.dtsi

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		/* Copyright (c) 2015 The Linux Foundation. All rights reserved.
		*
		* This program is free software; you can redistribute it and/or modify
		* it under the terms of the GNU General Public License version 2 and
		* only version 2 as published by the Free Software Foundation.
		*
		* This program is distributed in the hope that it will be useful,
		* but WITHOUT ANY WARRANTY; without even the implied warranty of
		* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
		* GNU General Public License for more details.
		*/

		#include "msm8937-mdss.dtsi"

		&mdss_dsi {
		vdda-supply = <&pmgold_l2>;
		vddio-supply = <&pmgold_l6>;

		ranges = <0x1a94000 0x1a94000 0x300
		0x1a94400 0x1a94400 0x280
		0x1a94b80 0x1a94b80 0x30
		0x193e000 0x193e000 0x30>;

		clocks = <&clock_gcc_mdss clk_mdss_mdp_vote_clk>,
		<&clock_gcc clk_gcc_mdss_ahb_clk>,
		<&clock_gcc clk_gcc_mdss_axi_clk>,
		<&clock_gcc_mdss clk_ext_byte0_clk_src>,
		<&clock_gcc_mdss clk_ext_pclk0_clk_src>;
		clock-names = "mdp_core_clk", "iface_clk", "bus_clk",
		"ext_byte0_clk", "ext_pixel0_clk";

		/delete-property/ qcom,mdss-fb-map-sec;

		};

		&mdss_dsi0 {
		vdd-supply = <&pmgold_l17>;
		vddio-supply = <&pmgold_l6>;
		};

		/delete-node/ &mdss_dsi1;

		&mdss_mdp {
		qcom,mdss-intf-off = <0x00000000 0x0006B800>;
		qcom,mdss-pingpong-off = <0x00071000>;

		qcom,mdss-per-pipe-panic-luts = <0x000f>,
		<0x0>,
		<0xfffc>,
		<0x0>;

		/delete-property/ qcom,mdss-highest-bank-bit;

		qcom,regs-dump-mdp = <0x01000 0x01454>,
		<0x02000 0x02064>,
		<0x02200 0x02264>,
		<0x02400 0x02464>,
		<0x05000 0x05150>,
		<0x05200 0x05230>,
		<0x15000 0x15150>,
		<0x17000 0x17150>,
		<0x25000 0x25150>,
		<0x35000 0x35150>,
		<0x45000 0x452bc>,
		<0x46000 0x462bc>,
		<0x55000 0x5522c>,
		<0x65000 0x652c0>,
		<0x66000 0x662c0>,
		<0x6b800 0x6ba68>,
		<0x71000 0x710d4>;

		qcom,regs-dump-names-mdp = "MDP",
		"CTL_0", "CTL_1", "CTL_2",
		"VIG0_SSPP", "VIG0",
		"RGB0_SSPP", "RGB1_SSPP",
		"DMA0_SSPP",
		"CURSOR0_SSPP",
		"LAYER_0", "LAYER_1",
		"DSPP_0",
		"WB_0", "WB_2",
		"INTF_1",
		"PP_0";
		};

		&mdss_rotator {
		/delete-property/ qcom,mdss-has-ubwc;
		};

		/delete-node/ &mdss_fb2;

arch/arm/boot/dts/qcom/msmgold-pinctrl.dtsi

+55 −0

Original line number	Diff line number	Diff line
		@@ -49,5 +49,60 @@
		};

		};

		pmx_mdss: pmx_mdss {
		mdss_dsi_active: mdss_dsi_active {
		mux {
		pins = "gpio60", "gpio98", "gpio99";
		function = "gpio";
		};

		config {
		pins = "gpio60", "gpio98", "gpio99";
		drive-strength = <8>; /* 8 mA */
		bias-disable = <0>; /* no pull */
		output-high;
		};
		};
		mdss_dsi_suspend: mdss_dsi_suspend {
		mux {
		pins = "gpio60", "gpio98", "gpio99";
		function = "gpio";
		};

		config {
		pins = "gpio60", "gpio98", "gpio99";
		drive-strength = <2>; /* 2 mA */
		bias-pull-down; /* pull down */
		};
		};
		};

		pmx_mdss_te {
		mdss_te_active: mdss_te_active {
		mux {
		pins = "gpio24";
		function = "mdp_vsync";
		};

		config {
		pins = "gpio24";
		drive-strength = <2>; /* 8 mA */
		bias-pull-down; /* pull down*/
		};
		};
		mdss_te_suspend: mdss_te_suspend {
		mux {
		pins = "gpio24";
		function = "mdp_vsync";
		};

		config {
		pins = "gpio24";
		drive-strength = <2>; /* 2 mA */
		bias-pull-down; /* pull down */
		};
		};
		};
		};
		};

arch/arm/boot/dts/qcom/msmgold.dtsi

+8 −0

Original line number	Diff line number	Diff line
		@@ -89,6 +89,9 @@
		size = <0 0x400000>;
		};

		cont_splash_mem: splash_region@83000000 {
		reg = <0x0 0x8dd00000 0x0 0x1400000>;
		};
		};

		soc: soc { };
		@@ -102,6 +105,8 @@
		#include "msmgold-iommu-domains.dtsi"
		#include "msmgold-smp2p.dtsi"
		#include "msmgold-coresight.dtsi"
		#include "msmgold-mdss.dtsi"
		#include "msmgold-mdss-pll.dtsi"

		&soc {
		#address-cells = <1>;
		@@ -448,6 +453,9 @@

		clock_gcc_mdss: qcom,gcc-mdss@1800000 {
		compatible = "qcom,gcc-mdss-gold";
		clocks = <&mdss_dsi0_pll clk_dsi_pll0_pixel_clk_src>,
		<&mdss_dsi0_pll clk_dsi_pll0_byte_clk_src>;
		clock-names = "pixel_src", "byte_src";
		#clock-cells = <1>;
		};