mmc: cmdq_hci: Fix ADMA error issue
The controller triggers an ADMA error when ADMA engine is configured
and used in 32-bit mode. This is because the current code always
writes 64-bit address to 32-bit address field of a transfer
descriptor (bits [63:32]). This corrupts the first 32-bit value
of the next transfer descriptor.
Below scenario describes how ADMA error can happen -
1. Req#1 - uses slot 1, prepares it's descriptors, queues to the controller
2. Req#2 - uses slot 0, prepares max descriptors (cq_host->mmc->max_segs).
3. Req#1 gets ADMA error from the controller.
At step 2, when it prepares the last transfer descriptor (max_segs), it
overwrites the 32-bit address field with a 64-bit address and thus corrupts
the first entry of slot 1 transfer descriptor.
Change-Id: I3eb2dbb40c76ec77626f647d6ec24df4a0858fcb
Signed-off-by:
Sahitya Tummala <stummala@codeaurora.org>
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