Loading arch/arm/boot/dts/qcom/msm8952-coresight.dtsi +4 −4 Original line number Diff line number Diff line Loading @@ -646,9 +646,9 @@ clock-names = "core_clk", "core_a_clk"; }; cti_modem_cpu0: cti@838000 { cti_modem_cpu0: cti@860000 { compatible = "arm,coresight-cti"; reg = <0x838000 0x1000>; reg = <0x860000 0x1000>; reg-names = "cti-base"; coresight-id = <37>; Loading @@ -660,9 +660,9 @@ clock-names = "core_clk", "core_a_clk"; }; cti_modem_cpu1: cti@860000 { cti_modem_cpu1: cti@838000 { compatible = "arm,coresight-cti"; reg = <0x860000 0x1000>; reg = <0x838000 0x1000>; reg-names = "cti-base"; coresight-id = <38>; Loading Loading
arch/arm/boot/dts/qcom/msm8952-coresight.dtsi +4 −4 Original line number Diff line number Diff line Loading @@ -646,9 +646,9 @@ clock-names = "core_clk", "core_a_clk"; }; cti_modem_cpu0: cti@838000 { cti_modem_cpu0: cti@860000 { compatible = "arm,coresight-cti"; reg = <0x838000 0x1000>; reg = <0x860000 0x1000>; reg-names = "cti-base"; coresight-id = <37>; Loading @@ -660,9 +660,9 @@ clock-names = "core_clk", "core_a_clk"; }; cti_modem_cpu1: cti@860000 { cti_modem_cpu1: cti@838000 { compatible = "arm,coresight-cti"; reg = <0x860000 0x1000>; reg = <0x838000 0x1000>; reg-names = "cti-base"; coresight-id = <38>; Loading