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Commit ec1f31ce authored by Xiaogang Cui's avatar Xiaogang Cui
Browse files

ARM: dts: msm: correct the CTI address for modem VEC and SCL on msm8952 



Correct the CPU CTI addresses for modem VEC and SCL to keep
in line with QTF.

Change-Id: I257935fdfee94c17cbad28f5c62cf3acc932cc71
Signed-off-by: default avatarXiaogang Cui <xiaogang@codeaurora.org>
parent 95314eae

arch/arm/boot/dts/qcom/msm8952-coresight.dtsi

+4 −4
Original line number Diff line number Diff line
@@ -646,9 +646,9 @@ 
		clock-names = "core_clk", "core_a_clk";

	};



	cti_modem_cpu0: cti@838000 {

	cti_modem_cpu0: cti@860000 {

		compatible = "arm,coresight-cti";

		reg = <0x838000 0x1000>;

		reg = <0x860000 0x1000>;

		reg-names = "cti-base";



		coresight-id = <37>;
@@ -660,9 +660,9 @@ 
		clock-names = "core_clk", "core_a_clk";

	};



	cti_modem_cpu1: cti@860000 {

	cti_modem_cpu1: cti@838000 {

		compatible = "arm,coresight-cti";

		reg = <0x860000 0x1000>;

		reg = <0x838000 0x1000>;

		reg-names = "cti-base";



		coresight-id = <38>;