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Commit cf7934a2 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge remote branch 'anholt/drm-intel-next' into drm-next-stage 

* anholt/drm-intel-next: (103 commits)
  drm/i915: Use a dmi quirk to skip a broken SDVO TV output.
  drm/i915: enable/disable LVDS port at DPMS time
  drm/i915: check for multiple write domains in pin_and_relocate
  drm/i915: clean-up i915_gem_flush_gpu_write_domain
  drm/i915: reuse i915_gpu_idle helper
  drm/i915: ensure lru ordering of fence_list
  drm/i915: extract fence stealing code
  drm/i915: fixup active list locking in object_unbind
  drm/i915: reuse i915_gem_object_put_fence_reg for fence stealing code
  drm/i915: Add dependency on the intel agp module
  drm/i915: More s/IS_IRONLAKE/HAS_PCH_SPLIT for Sandybridge.
  drm/i915: Correct the Sandybridge chipset info structs.
  drm/i915: Disable the hangcheck reset on Sandybridge until we add support.
  drm/i915: Add a new mobile Sandybridge PCI ID.
  agp/intel: Add a new Sandybridge HB/IG PCI ID combo.
  drm/i915, agp/intel: Fix stolen memory size on Sandybridge
  drm/i915: Correct locking in the modesetting failure path, fixing a BUG_ON.
  drm/i915: Disable the surface tile swizzling on Sandybridge.
  agp/intel: Use a non-reserved value for the cache field of the PTEs.
  drm/i915: Fix sandybridge status page setup.
  ...
parents aa71fa3c 6070a4a9

drivers/char/agp/intel-agp.c

+113 −10
Original line number Diff line number Diff line
@@ -10,6 +10,9 @@ 
#include <linux/agp_backend.h>

#include "agp.h"



int intel_agp_enabled;

EXPORT_SYMBOL(intel_agp_enabled);



/*

 * If we have Intel graphics, we're not going to have anything other than

 * an Intel IOMMU. So make the correct use of the PCI DMA API contingent
@@ -64,6 +67,10 @@ 
#define PCI_DEVICE_ID_INTEL_IRONLAKE_MA_HB	    0x0062

#define PCI_DEVICE_ID_INTEL_IRONLAKE_MC2_HB    0x006a

#define PCI_DEVICE_ID_INTEL_IRONLAKE_M_IG	    0x0046

#define PCI_DEVICE_ID_INTEL_SANDYBRIDGE_HB  0x0100

#define PCI_DEVICE_ID_INTEL_SANDYBRIDGE_IG  0x0102

#define PCI_DEVICE_ID_INTEL_SANDYBRIDGE_M_HB  0x0104

#define PCI_DEVICE_ID_INTEL_SANDYBRIDGE_M_IG  0x0106



/* cover 915 and 945 variants */

#define IS_I915 (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_E7221_HB || \
@@ -98,7 +105,9 @@ 
		agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_IRONLAKE_D_HB || \

		agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_IRONLAKE_M_HB || \

		agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_IRONLAKE_MA_HB || \

		agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_IRONLAKE_MC2_HB)

		agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_IRONLAKE_MC2_HB || \

		agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_SANDYBRIDGE_HB || \

		agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_SANDYBRIDGE_M_HB)



extern int agp_memory_reserved;
@@ -147,6 +156,25 @@ extern int agp_memory_reserved; 
#define INTEL_I7505_AGPCTRL	0x70

#define INTEL_I7505_MCHCFG	0x50



#define SNB_GMCH_CTRL	0x50

#define SNB_GMCH_GMS_STOLEN_MASK	0xF8

#define SNB_GMCH_GMS_STOLEN_32M		(1 << 3)

#define SNB_GMCH_GMS_STOLEN_64M		(2 << 3)

#define SNB_GMCH_GMS_STOLEN_96M		(3 << 3)

#define SNB_GMCH_GMS_STOLEN_128M	(4 << 3)

#define SNB_GMCH_GMS_STOLEN_160M	(5 << 3)

#define SNB_GMCH_GMS_STOLEN_192M	(6 << 3)

#define SNB_GMCH_GMS_STOLEN_224M	(7 << 3)

#define SNB_GMCH_GMS_STOLEN_256M	(8 << 3)

#define SNB_GMCH_GMS_STOLEN_288M	(9 << 3)

#define SNB_GMCH_GMS_STOLEN_320M	(0xa << 3)

#define SNB_GMCH_GMS_STOLEN_352M	(0xb << 3)

#define SNB_GMCH_GMS_STOLEN_384M	(0xc << 3)

#define SNB_GMCH_GMS_STOLEN_416M	(0xd << 3)

#define SNB_GMCH_GMS_STOLEN_448M	(0xe << 3)

#define SNB_GMCH_GMS_STOLEN_480M	(0xf << 3)

#define SNB_GMCH_GMS_STOLEN_512M	(0x10 << 3)



static const struct aper_size_info_fixed intel_i810_sizes[] =

{

	{64, 16384, 4},
@@ -293,6 +321,13 @@ static void intel_agp_insert_sg_entries(struct agp_memory *mem, 
					off_t pg_start, int mask_type)

{

	int i, j;

	u32 cache_bits = 0;



	if (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_SANDYBRIDGE_HB ||

	    agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_SANDYBRIDGE_M_HB)

	{

		cache_bits = I830_PTE_SYSTEM_CACHED;

	}



	for (i = 0, j = pg_start; i < mem->page_count; i++, j++) {

		writel(agp_bridge->driver->mask_memory(agp_bridge,
@@ -613,7 +648,7 @@ static struct aper_size_info_fixed intel_i830_sizes[] = 
static void intel_i830_init_gtt_entries(void)

{

	u16 gmch_ctrl;

	int gtt_entries;

	int gtt_entries = 0;

	u8 rdct;

	int local = 0;

	static const int ddt[4] = { 0, 16, 32, 64 };
@@ -705,6 +740,63 @@ static void intel_i830_init_gtt_entries(void) 
			gtt_entries = 0;

			break;

		}

	} else if (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_SANDYBRIDGE_HB ||

		   agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_SANDYBRIDGE_M_HB) {

		/*

		 * SandyBridge has new memory control reg at 0x50.w

		 */

		u16 snb_gmch_ctl;

		pci_read_config_word(intel_private.pcidev, SNB_GMCH_CTRL, &snb_gmch_ctl);

		switch (snb_gmch_ctl & SNB_GMCH_GMS_STOLEN_MASK) {

		case SNB_GMCH_GMS_STOLEN_32M:

			gtt_entries = MB(32) - KB(size);

			break;

		case SNB_GMCH_GMS_STOLEN_64M:

			gtt_entries = MB(64) - KB(size);

			break;

		case SNB_GMCH_GMS_STOLEN_96M:

			gtt_entries = MB(96) - KB(size);

			break;

		case SNB_GMCH_GMS_STOLEN_128M:

			gtt_entries = MB(128) - KB(size);

			break;

		case SNB_GMCH_GMS_STOLEN_160M:

			gtt_entries = MB(160) - KB(size);

			break;

		case SNB_GMCH_GMS_STOLEN_192M:

			gtt_entries = MB(192) - KB(size);

			break;

		case SNB_GMCH_GMS_STOLEN_224M:

			gtt_entries = MB(224) - KB(size);

			break;

		case SNB_GMCH_GMS_STOLEN_256M:

			gtt_entries = MB(256) - KB(size);

			break;

		case SNB_GMCH_GMS_STOLEN_288M:

			gtt_entries = MB(288) - KB(size);

			break;

		case SNB_GMCH_GMS_STOLEN_320M:

			gtt_entries = MB(320) - KB(size);

			break;

		case SNB_GMCH_GMS_STOLEN_352M:

			gtt_entries = MB(352) - KB(size);

			break;

		case SNB_GMCH_GMS_STOLEN_384M:

			gtt_entries = MB(384) - KB(size);

			break;

		case SNB_GMCH_GMS_STOLEN_416M:

			gtt_entries = MB(416) - KB(size);

			break;

		case SNB_GMCH_GMS_STOLEN_448M:

			gtt_entries = MB(448) - KB(size);

			break;

		case SNB_GMCH_GMS_STOLEN_480M:

			gtt_entries = MB(480) - KB(size);

			break;

		case SNB_GMCH_GMS_STOLEN_512M:

			gtt_entries = MB(512) - KB(size);

			break;

		}

	} else {

		switch (gmch_ctrl & I855_GMCH_GMS_MASK) {

		case I855_GMCH_GMS_STOLEN_1M:
@@ -1364,6 +1456,8 @@ static void intel_i965_get_gtt_range(int *gtt_offset, int *gtt_size) 
	case PCI_DEVICE_ID_INTEL_IRONLAKE_M_HB:

	case PCI_DEVICE_ID_INTEL_IRONLAKE_MA_HB:

	case PCI_DEVICE_ID_INTEL_IRONLAKE_MC2_HB:

	case PCI_DEVICE_ID_INTEL_SANDYBRIDGE_HB:

	case PCI_DEVICE_ID_INTEL_SANDYBRIDGE_M_HB:

		*gtt_offset = *gtt_size = MB(2);

		break;

	default:
@@ -2345,9 +2439,9 @@ static const struct intel_driver_description { 
		NULL, &intel_g33_driver },

	{ PCI_DEVICE_ID_INTEL_Q33_HB, PCI_DEVICE_ID_INTEL_Q33_IG, 0, "Q33",

		NULL, &intel_g33_driver },

	{ PCI_DEVICE_ID_INTEL_PINEVIEW_M_HB, PCI_DEVICE_ID_INTEL_PINEVIEW_M_IG, 0, "Pineview",

	{ PCI_DEVICE_ID_INTEL_PINEVIEW_M_HB, PCI_DEVICE_ID_INTEL_PINEVIEW_M_IG, 0, "GMA3150",

		NULL, &intel_g33_driver },

	{ PCI_DEVICE_ID_INTEL_PINEVIEW_HB, PCI_DEVICE_ID_INTEL_PINEVIEW_IG, 0, "Pineview",

	{ PCI_DEVICE_ID_INTEL_PINEVIEW_HB, PCI_DEVICE_ID_INTEL_PINEVIEW_IG, 0, "GMA3150",

		NULL, &intel_g33_driver },

	{ PCI_DEVICE_ID_INTEL_GM45_HB, PCI_DEVICE_ID_INTEL_GM45_IG, 0,

	    "GM45", NULL, &intel_i965_driver },
@@ -2362,13 +2456,17 @@ static const struct intel_driver_description { 
	{ PCI_DEVICE_ID_INTEL_G41_HB, PCI_DEVICE_ID_INTEL_G41_IG, 0,

	    "G41", NULL, &intel_i965_driver },

	{ PCI_DEVICE_ID_INTEL_IRONLAKE_D_HB, PCI_DEVICE_ID_INTEL_IRONLAKE_D_IG, 0,

	    "Ironlake/D", NULL, &intel_i965_driver },

	    "HD Graphics", NULL, &intel_i965_driver },

	{ PCI_DEVICE_ID_INTEL_IRONLAKE_M_HB, PCI_DEVICE_ID_INTEL_IRONLAKE_M_IG, 0,

	    "Ironlake/M", NULL, &intel_i965_driver },

	    "HD Graphics", NULL, &intel_i965_driver },

	{ PCI_DEVICE_ID_INTEL_IRONLAKE_MA_HB, PCI_DEVICE_ID_INTEL_IRONLAKE_M_IG, 0,

	    "Ironlake/MA", NULL, &intel_i965_driver },

	    "HD Graphics", NULL, &intel_i965_driver },

	{ PCI_DEVICE_ID_INTEL_IRONLAKE_MC2_HB, PCI_DEVICE_ID_INTEL_IRONLAKE_M_IG, 0,

	    "Ironlake/MC2", NULL, &intel_i965_driver },

	    "HD Graphics", NULL, &intel_i965_driver },

	{ PCI_DEVICE_ID_INTEL_SANDYBRIDGE_HB, PCI_DEVICE_ID_INTEL_SANDYBRIDGE_IG, 0,

	    "Sandybridge", NULL, &intel_i965_driver },

	{ PCI_DEVICE_ID_INTEL_SANDYBRIDGE_M_HB, PCI_DEVICE_ID_INTEL_SANDYBRIDGE_M_IG, 0,

	    "Sandybridge", NULL, &intel_i965_driver },

	{ 0, 0, 0, NULL, NULL, NULL }

};
@@ -2378,7 +2476,7 @@ static int __devinit agp_intel_probe(struct pci_dev *pdev, 
	struct agp_bridge_data *bridge;

	u8 cap_ptr = 0;

	struct resource *r;

	int i;

	int i, err;



	cap_ptr = pci_find_capability(pdev, PCI_CAP_ID_AGP);
@@ -2470,7 +2568,10 @@ static int __devinit agp_intel_probe(struct pci_dev *pdev, 
	}



	pci_set_drvdata(pdev, bridge);

	return agp_add_bridge(bridge);

	err = agp_add_bridge(bridge);

	if (!err)

		intel_agp_enabled = 1;

	return err;

}



static void __devexit agp_intel_remove(struct pci_dev *pdev)
@@ -2575,6 +2676,8 @@ static struct pci_device_id agp_intel_pci_table[] = { 
	ID(PCI_DEVICE_ID_INTEL_IRONLAKE_M_HB),

	ID(PCI_DEVICE_ID_INTEL_IRONLAKE_MA_HB),

	ID(PCI_DEVICE_ID_INTEL_IRONLAKE_MC2_HB),

	ID(PCI_DEVICE_ID_INTEL_SANDYBRIDGE_HB),

	ID(PCI_DEVICE_ID_INTEL_SANDYBRIDGE_M_HB),

	{ }

};

drivers/gpu/drm/Makefile

+1 −1
Original line number Diff line number Diff line
@@ -4,7 +4,7 @@ 


ccflags-y := -Iinclude/drm



drm-y       :=	drm_auth.o drm_bufs.o drm_cache.o \

drm-y       :=	drm_auth.o drm_buffer.o drm_bufs.o drm_cache.o \

		drm_context.o drm_dma.o drm_drawable.o \

		drm_drv.o drm_fops.o drm_gem.o drm_ioctl.o drm_irq.o \

		drm_lock.o drm_memory.o drm_proc.o drm_stub.o drm_vm.o \

drivers/gpu/drm/drm_buffer.c

0 → 100644
+184 −0
Original line number Diff line number Diff line 
/**************************************************************************

 *

 * Copyright 2010 Pauli Nieminen.

 * All Rights Reserved.

 *

 * Permission is hereby granted, free of charge, to any person obtaining a

 * copy of this software and associated documentation files (the

 * "Software"), to deal in the Software without restriction, including

 * without limitation the rights to use, copy, modify, merge, publish,

 * distribute, sub license, and/or sell copies of the Software, and to

 * permit persons to whom the Software is furnished to do so, subject to

 * the following conditions:

 *

 * The above copyright notice and this permission notice (including the

 * next paragraph) shall be included in all copies or substantial portions

 * of the Software.

 *

 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR

 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,

 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL

 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,

 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR

 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE

 * USE OR OTHER DEALINGS IN THE SOFTWARE.

 *

 *

 **************************************************************************/

/*

 * Multipart buffer for coping data which is larger than the page size.

 *

 * Authors:

 * Pauli Nieminen <suokkos-at-gmail-dot-com>

 */



#include "drm_buffer.h"



/**

 * Allocate the drm buffer object.

 *

 *   buf: Pointer to a pointer where the object is stored.

 *   size: The number of bytes to allocate.

 */

int drm_buffer_alloc(struct drm_buffer **buf, int size)

{

	int nr_pages = size / PAGE_SIZE + 1;

	int idx;



	/* Allocating pointer table to end of structure makes drm_buffer

	 * variable sized */

	*buf = kzalloc(sizeof(struct drm_buffer) + nr_pages*sizeof(char *),

			GFP_KERNEL);



	if (*buf == NULL) {

		DRM_ERROR("Failed to allocate drm buffer object to hold"

				" %d bytes in %d pages.\n",

				size, nr_pages);

		return -ENOMEM;

	}



	(*buf)->size = size;



	for (idx = 0; idx < nr_pages; ++idx) {



		(*buf)->data[idx] =

			kmalloc(min(PAGE_SIZE, size - idx * PAGE_SIZE),

				GFP_KERNEL);





		if ((*buf)->data[idx] == NULL) {

			DRM_ERROR("Failed to allocate %dth page for drm"

					" buffer with %d bytes and %d pages.\n",

					idx + 1, size, nr_pages);

			goto error_out;

		}



	}



	return 0;



error_out:



	/* Only last element can be null pointer so check for it first. */

	if ((*buf)->data[idx])

		kfree((*buf)->data[idx]);



	for (--idx; idx >= 0; --idx)

		kfree((*buf)->data[idx]);



	kfree(*buf);

	return -ENOMEM;

}

EXPORT_SYMBOL(drm_buffer_alloc);



/**

 * Copy the user data to the begin of the buffer and reset the processing

 * iterator.

 *

 *   user_data: A pointer the data that is copied to the buffer.

 *   size: The Number of bytes to copy.

 */

extern int drm_buffer_copy_from_user(struct drm_buffer *buf,

		void __user *user_data, int size)

{

	int nr_pages = size / PAGE_SIZE + 1;

	int idx;



	if (size > buf->size) {

		DRM_ERROR("Requesting to copy %d bytes to a drm buffer with"

				" %d bytes space\n",

				size, buf->size);

		return -EFAULT;

	}



	for (idx = 0; idx < nr_pages; ++idx) {



		if (DRM_COPY_FROM_USER(buf->data[idx],

			user_data + idx * PAGE_SIZE,

			min(PAGE_SIZE, size - idx * PAGE_SIZE))) {

			DRM_ERROR("Failed to copy user data (%p) to drm buffer"

					" (%p) %dth page.\n",

					user_data, buf, idx);

			return -EFAULT;



		}

	}

	buf->iterator = 0;

	return 0;

}

EXPORT_SYMBOL(drm_buffer_copy_from_user);



/**

 * Free the drm buffer object

 */

void drm_buffer_free(struct drm_buffer *buf)

{



	if (buf != NULL) {



		int nr_pages = buf->size / PAGE_SIZE + 1;

		int idx;

		for (idx = 0; idx < nr_pages; ++idx)

			kfree(buf->data[idx]);



		kfree(buf);

	}

}

EXPORT_SYMBOL(drm_buffer_free);



/**

 * Read an object from buffer that may be split to multiple parts. If object

 * is not split function just returns the pointer to object in buffer. But in

 * case of split object data is copied to given stack object that is suplied

 * by caller.

 *

 * The processing location of the buffer is also advanced to the next byte

 * after the object.

 *

 *   objsize: The size of the objet in bytes.

 *   stack_obj: A pointer to a memory location where object can be copied.

 */

void *drm_buffer_read_object(struct drm_buffer *buf,

		int objsize, void *stack_obj)

{

	int idx = drm_buffer_index(buf);

	int page = drm_buffer_page(buf);

	void *obj = 0;



	if (idx + objsize <= PAGE_SIZE) {

		obj = &buf->data[page][idx];

	} else {

		/* The object is split which forces copy to temporary object.*/

		int beginsz = PAGE_SIZE - idx;

		memcpy(stack_obj, &buf->data[page][idx], beginsz);



		memcpy(stack_obj + beginsz, &buf->data[page + 1][0],

				objsize - beginsz);



		obj = stack_obj;

	}



	drm_buffer_advance(buf, objsize);

	return obj;

}

EXPORT_SYMBOL(drm_buffer_read_object);

drivers/gpu/drm/drm_edid.c

+15 −15
Original line number Diff line number Diff line
@@ -60,8 +60,7 @@ 
#define EDID_QUIRK_FIRST_DETAILED_PREFERRED	(1 << 5)

/* use +hsync +vsync for detailed mode */

#define EDID_QUIRK_DETAILED_SYNC_PP		(1 << 6)

/* define the number of Extension EDID block */

#define MAX_EDID_EXT_NUM 4





#define LEVEL_DMT	0

#define LEVEL_GTF	1
@@ -114,14 +113,14 @@ static const u8 edid_header[] = { 
};



/**

 * edid_is_valid - sanity check EDID data

 * drm_edid_is_valid - sanity check EDID data

 * @edid: EDID data

 *

 * Sanity check the EDID block by looking at the header, the version number

 * and the checksum.  Return 0 if the EDID doesn't check out, or 1 if it's

 * valid.

 */

static bool edid_is_valid(struct edid *edid)

bool drm_edid_is_valid(struct edid *edid)

{

	int i, score = 0;

	u8 csum = 0;
@@ -163,6 +162,7 @@ bad: 
	}

	return 0;

}

EXPORT_SYMBOL(drm_edid_is_valid);



/**

 * edid_vendor - match a string against EDID's obfuscated vendor field
@@ -1112,8 +1112,8 @@ static int add_detailed_info_eedid(struct drm_connector *connector, 
	}



	/* Chose real EDID extension number */

	edid_ext_num = edid->extensions > MAX_EDID_EXT_NUM ?

		       MAX_EDID_EXT_NUM : edid->extensions;

	edid_ext_num = edid->extensions > DRM_MAX_EDID_EXT_NUM ?

		DRM_MAX_EDID_EXT_NUM : edid->extensions;



	/* Find CEA extension */

	for (i = 0; i < edid_ext_num; i++) {
@@ -1195,7 +1195,7 @@ static int drm_ddc_read_edid(struct drm_connector *connector, 
	for (i = 0; i < 4; i++) {

		if (drm_do_probe_ddc_edid(adapter, buf, len))

			return -1;

		if (edid_is_valid((struct edid *)buf))

		if (drm_edid_is_valid((struct edid *)buf))

			return 0;

	}
@@ -1220,7 +1220,7 @@ struct edid *drm_get_edid(struct drm_connector *connector, 
	int ret;

	struct edid *edid;



	edid = kmalloc(EDID_LENGTH * (MAX_EDID_EXT_NUM + 1),

	edid = kmalloc(EDID_LENGTH * (DRM_MAX_EDID_EXT_NUM + 1),

		       GFP_KERNEL);

	if (edid == NULL) {

		dev_warn(&connector->dev->pdev->dev,
@@ -1238,14 +1238,14 @@ struct edid *drm_get_edid(struct drm_connector *connector, 
	if (edid->extensions != 0) {

		int edid_ext_num = edid->extensions;



		if (edid_ext_num > MAX_EDID_EXT_NUM) {

		if (edid_ext_num > DRM_MAX_EDID_EXT_NUM) {

			dev_warn(&connector->dev->pdev->dev,

				 "The number of extension(%d) is "

				 "over max (%d), actually read number (%d)\n",

				 edid_ext_num, MAX_EDID_EXT_NUM,

				 MAX_EDID_EXT_NUM);

				 edid_ext_num, DRM_MAX_EDID_EXT_NUM,

				 DRM_MAX_EDID_EXT_NUM);

			/* Reset EDID extension number to be read */

			edid_ext_num = MAX_EDID_EXT_NUM;

			edid_ext_num = DRM_MAX_EDID_EXT_NUM;

		}

		/* Read EDID including extensions too */

		ret = drm_ddc_read_edid(connector, adapter, (char *)edid,
@@ -1288,8 +1288,8 @@ bool drm_detect_hdmi_monitor(struct edid *edid) 
		goto end;



	/* Chose real EDID extension number */

	edid_ext_num = edid->extensions > MAX_EDID_EXT_NUM ?

		       MAX_EDID_EXT_NUM : edid->extensions;

	edid_ext_num = edid->extensions > DRM_MAX_EDID_EXT_NUM ?

		       DRM_MAX_EDID_EXT_NUM : edid->extensions;



	/* Find CEA extension */

	for (i = 0; i < edid_ext_num; i++) {
@@ -1346,7 +1346,7 @@ int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid) 
	if (edid == NULL) {

		return 0;

	}

	if (!edid_is_valid(edid)) {

	if (!drm_edid_is_valid(edid)) {

		dev_warn(&connector->dev->pdev->dev, "%s: EDID invalid.\n",

			 drm_get_connector_name(connector));

		return 0;

drivers/gpu/drm/i915/i915_debugfs.c

+252 −1
Original line number Diff line number Diff line
@@ -162,7 +162,7 @@ static int i915_interrupt_info(struct seq_file *m, void *data) 
	struct drm_device *dev = node->minor->dev;

	drm_i915_private_t *dev_priv = dev->dev_private;



	if (!IS_IRONLAKE(dev)) {

	if (!HAS_PCH_SPLIT(dev)) {

		seq_printf(m, "Interrupt enable:    %08x\n",

			   I915_READ(IER));

		seq_printf(m, "Interrupt identity:  %08x\n",
@@ -350,6 +350,36 @@ static int i915_ringbuffer_info(struct seq_file *m, void *data) 
	return 0;

}



static const char *pin_flag(int pinned)

{

	if (pinned > 0)

		return " P";

	else if (pinned < 0)

		return " p";

	else

		return "";

}



static const char *tiling_flag(int tiling)

{

	switch (tiling) {

	default:

	case I915_TILING_NONE: return "";

	case I915_TILING_X: return " X";

	case I915_TILING_Y: return " Y";

	}

}



static const char *dirty_flag(int dirty)

{

	return dirty ? " dirty" : "";

}



static const char *purgeable_flag(int purgeable)

{

	return purgeable ? " purgeable" : "";

}



static int i915_error_state(struct seq_file *m, void *unused)

{

	struct drm_info_node *node = (struct drm_info_node *) m->private;
@@ -357,6 +387,7 @@ static int i915_error_state(struct seq_file *m, void *unused) 
	drm_i915_private_t *dev_priv = dev->dev_private;

	struct drm_i915_error_state *error;

	unsigned long flags;

	int i, page, offset, elt;



	spin_lock_irqsave(&dev_priv->error_lock, flags);

	if (!dev_priv->first_error) {
@@ -368,6 +399,7 @@ static int i915_error_state(struct seq_file *m, void *unused) 


	seq_printf(m, "Time: %ld s %ld us\n", error->time.tv_sec,

		   error->time.tv_usec);

	seq_printf(m, "PCI ID: 0x%04x\n", dev->pci_device);

	seq_printf(m, "EIR: 0x%08x\n", error->eir);

	seq_printf(m, "  PGTBL_ER: 0x%08x\n", error->pgtbl_er);

	seq_printf(m, "  INSTPM: 0x%08x\n", error->instpm);
@@ -379,6 +411,59 @@ static int i915_error_state(struct seq_file *m, void *unused) 
		seq_printf(m, "  INSTPS: 0x%08x\n", error->instps);

		seq_printf(m, "  INSTDONE1: 0x%08x\n", error->instdone1);

	}

	seq_printf(m, "seqno: 0x%08x\n", error->seqno);



	if (error->active_bo_count) {

		seq_printf(m, "Buffers [%d]:\n", error->active_bo_count);



		for (i = 0; i < error->active_bo_count; i++) {

			seq_printf(m, "  %08x %8zd %08x %08x %08x%s%s%s%s",

				   error->active_bo[i].gtt_offset,

				   error->active_bo[i].size,

				   error->active_bo[i].read_domains,

				   error->active_bo[i].write_domain,

				   error->active_bo[i].seqno,

				   pin_flag(error->active_bo[i].pinned),

				   tiling_flag(error->active_bo[i].tiling),

				   dirty_flag(error->active_bo[i].dirty),

				   purgeable_flag(error->active_bo[i].purgeable));



			if (error->active_bo[i].name)

				seq_printf(m, " (name: %d)", error->active_bo[i].name);

			if (error->active_bo[i].fence_reg != I915_FENCE_REG_NONE)

				seq_printf(m, " (fence: %d)", error->active_bo[i].fence_reg);



			seq_printf(m, "\n");

		}

	}



	for (i = 0; i < ARRAY_SIZE(error->batchbuffer); i++) {

		if (error->batchbuffer[i]) {

			struct drm_i915_error_object *obj = error->batchbuffer[i];



			seq_printf(m, "--- gtt_offset = 0x%08x\n", obj->gtt_offset);

			offset = 0;

			for (page = 0; page < obj->page_count; page++) {

				for (elt = 0; elt < PAGE_SIZE/4; elt++) {

					seq_printf(m, "%08x :  %08x\n", offset, obj->pages[page][elt]);

					offset += 4;

				}

			}

		}

	}



	if (error->ringbuffer) {

		struct drm_i915_error_object *obj = error->ringbuffer;



		seq_printf(m, "--- ringbuffer = 0x%08x\n", obj->gtt_offset);

		offset = 0;

		for (page = 0; page < obj->page_count; page++) {

			for (elt = 0; elt < PAGE_SIZE/4; elt++) {

				seq_printf(m, "%08x :  %08x\n", offset, obj->pages[page][elt]);

				offset += 4;

			}

		}

	}



out:

	spin_unlock_irqrestore(&dev_priv->error_lock, flags);
@@ -386,6 +471,165 @@ out: 
	return 0;

}



static int i915_rstdby_delays(struct seq_file *m, void *unused)

{

	struct drm_info_node *node = (struct drm_info_node *) m->private;

	struct drm_device *dev = node->minor->dev;

	drm_i915_private_t *dev_priv = dev->dev_private;

	u16 crstanddelay = I915_READ16(CRSTANDVID);



	seq_printf(m, "w/ctx: %d, w/o ctx: %d\n", (crstanddelay >> 8) & 0x3f, (crstanddelay & 0x3f));



	return 0;

}



static int i915_cur_delayinfo(struct seq_file *m, void *unused)

{

	struct drm_info_node *node = (struct drm_info_node *) m->private;

	struct drm_device *dev = node->minor->dev;

	drm_i915_private_t *dev_priv = dev->dev_private;

	u16 rgvswctl = I915_READ16(MEMSWCTL);



	seq_printf(m, "Last command: 0x%01x\n", (rgvswctl >> 13) & 0x3);

	seq_printf(m, "Command status: %d\n", (rgvswctl >> 12) & 1);

	seq_printf(m, "P%d DELAY 0x%02x\n", (rgvswctl >> 8) & 0xf,

		   rgvswctl & 0x3f);



	return 0;

}



static int i915_delayfreq_table(struct seq_file *m, void *unused)

{

	struct drm_info_node *node = (struct drm_info_node *) m->private;

	struct drm_device *dev = node->minor->dev;

	drm_i915_private_t *dev_priv = dev->dev_private;

	u32 delayfreq;

	int i;



	for (i = 0; i < 16; i++) {

		delayfreq = I915_READ(PXVFREQ_BASE + i * 4);

		seq_printf(m, "P%02dVIDFREQ: 0x%08x\n", i, delayfreq);

	}



	return 0;

}



static inline int MAP_TO_MV(int map)

{

	return 1250 - (map * 25);

}



static int i915_inttoext_table(struct seq_file *m, void *unused)

{

	struct drm_info_node *node = (struct drm_info_node *) m->private;

	struct drm_device *dev = node->minor->dev;

	drm_i915_private_t *dev_priv = dev->dev_private;

	u32 inttoext;

	int i;



	for (i = 1; i <= 32; i++) {

		inttoext = I915_READ(INTTOEXT_BASE_ILK + i * 4);

		seq_printf(m, "INTTOEXT%02d: 0x%08x\n", i, inttoext);

	}



	return 0;

}



static int i915_drpc_info(struct seq_file *m, void *unused)

{

	struct drm_info_node *node = (struct drm_info_node *) m->private;

	struct drm_device *dev = node->minor->dev;

	drm_i915_private_t *dev_priv = dev->dev_private;

	u32 rgvmodectl = I915_READ(MEMMODECTL);



	seq_printf(m, "HD boost: %s\n", (rgvmodectl & MEMMODE_BOOST_EN) ?

		   "yes" : "no");

	seq_printf(m, "Boost freq: %d\n",

		   (rgvmodectl & MEMMODE_BOOST_FREQ_MASK) >>

		   MEMMODE_BOOST_FREQ_SHIFT);

	seq_printf(m, "HW control enabled: %s\n",

		   rgvmodectl & MEMMODE_HWIDLE_EN ? "yes" : "no");

	seq_printf(m, "SW control enabled: %s\n",

		   rgvmodectl & MEMMODE_SWMODE_EN ? "yes" : "no");

	seq_printf(m, "Gated voltage change: %s\n",

		   rgvmodectl & MEMMODE_RCLK_GATE ? "yes" : "no");

	seq_printf(m, "Starting frequency: P%d\n",

		   (rgvmodectl & MEMMODE_FSTART_MASK) >> MEMMODE_FSTART_SHIFT);

	seq_printf(m, "Max frequency: P%d\n",

		   (rgvmodectl & MEMMODE_FMAX_MASK) >> MEMMODE_FMAX_SHIFT);

	seq_printf(m, "Min frequency: P%d\n", (rgvmodectl & MEMMODE_FMIN_MASK));



	return 0;

}



static int i915_fbc_status(struct seq_file *m, void *unused)

{

	struct drm_info_node *node = (struct drm_info_node *) m->private;

	struct drm_device *dev = node->minor->dev;

	struct drm_crtc *crtc;

	drm_i915_private_t *dev_priv = dev->dev_private;

	bool fbc_enabled = false;



	if (!dev_priv->display.fbc_enabled) {

		seq_printf(m, "FBC unsupported on this chipset\n");

		return 0;

	}



	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {

		if (!crtc->enabled)

			continue;

		if (dev_priv->display.fbc_enabled(crtc))

			fbc_enabled = true;

	}



	if (fbc_enabled) {

		seq_printf(m, "FBC enabled\n");

	} else {

		seq_printf(m, "FBC disabled: ");

		switch (dev_priv->no_fbc_reason) {

		case FBC_STOLEN_TOO_SMALL:

			seq_printf(m, "not enough stolen memory");

			break;

		case FBC_UNSUPPORTED_MODE:

			seq_printf(m, "mode not supported");

			break;

		case FBC_MODE_TOO_LARGE:

			seq_printf(m, "mode too large");

			break;

		case FBC_BAD_PLANE:

			seq_printf(m, "FBC unsupported on plane");

			break;

		case FBC_NOT_TILED:

			seq_printf(m, "scanout buffer not tiled");

			break;

		default:

			seq_printf(m, "unknown reason");

		}

		seq_printf(m, "\n");

	}

	return 0;

}



static int i915_sr_status(struct seq_file *m, void *unused)

{

	struct drm_info_node *node = (struct drm_info_node *) m->private;

	struct drm_device *dev = node->minor->dev;

	drm_i915_private_t *dev_priv = dev->dev_private;

	bool sr_enabled = false;



	if (IS_I965G(dev) || IS_I945G(dev) || IS_I945GM(dev))

		sr_enabled = I915_READ(FW_BLC_SELF) & FW_BLC_SELF_EN;

	else if (IS_I915GM(dev))

		sr_enabled = I915_READ(INSTPM) & INSTPM_SELF_EN;

	else if (IS_PINEVIEW(dev))

		sr_enabled = I915_READ(DSPFW3) & PINEVIEW_SELF_REFRESH_EN;



	seq_printf(m, "self-refresh: %s\n", sr_enabled ? "enabled" :

		   "disabled");



	return 0;

}



static int

i915_wedged_open(struct inode *inode,

		 struct file *filp)
@@ -503,6 +747,13 @@ static struct drm_info_list i915_debugfs_list[] = { 
	{"i915_ringbuffer_info", i915_ringbuffer_info, 0},

	{"i915_batchbuffers", i915_batchbuffer_info, 0},

	{"i915_error_state", i915_error_state, 0},

	{"i915_rstdby_delays", i915_rstdby_delays, 0},

	{"i915_cur_delayinfo", i915_cur_delayinfo, 0},

	{"i915_delayfreq_table", i915_delayfreq_table, 0},

	{"i915_inttoext_table", i915_inttoext_table, 0},

	{"i915_drpc_info", i915_drpc_info, 0},

	{"i915_fbc_status", i915_fbc_status, 0},

	{"i915_sr_status", i915_sr_status, 0},

};

#define I915_DEBUGFS_ENTRIES ARRAY_SIZE(i915_debugfs_list)