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Commit c6c7d7c3 authored by Manuel Lauss's avatar Manuel Lauss Committed by Ralf Baechle
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MIPS: Alchemy: Fix db1200 PSC clock enablement 



Enable PSC0 (I2C/SPI) clock and leave PSC1 (Audio) alone.  This patch
restores functionality to both Audio and I2C/SPI.

Signed-off-by: default avatarManuel Lauss <manuel.lauss@gmail.com>
Cc: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/7544/


Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent 4588b58d

arch/mips/alchemy/devboards/db1200.c

+1 −5
Original line number Diff line number Diff line
@@ -847,6 +847,7 @@ int __init db1200_dev_setup(void) 
			pr_warn("DB1200: cant get I2C close to 50MHz\n");

		else

			clk_set_rate(c, pfc);

		clk_prepare_enable(c);

		clk_put(c);

	}
@@ -922,11 +923,6 @@ int __init db1200_dev_setup(void) 
	}



	/* Audio PSC clock is supplied externally. (FIXME: platdata!!) */

	c = clk_get(NULL, "psc1_intclk");

	if (!IS_ERR(c)) {

		clk_prepare_enable(c);

		clk_put(c);

	}

	__raw_writel(PSC_SEL_CLK_SERCLK,

	    (void __iomem *)KSEG1ADDR(AU1550_PSC1_PHYS_ADDR) + PSC_SEL_OFFSET);

	wmb();