Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 4588b58d authored by Hauke Mehrtens's avatar Hauke Mehrtens Committed by Ralf Baechle
Browse files

MIPS: BCM47XX: Fix reboot problem on BCM4705/BCM4785 



This adds some code based on code from the Broadcom GPL tar to fix the
reboot problems on BCM4705/BCM4785. I tried rebooting my device for ~10
times and have never seen a problem. This reverts the changes in the
previous commit and adds the real fix as suggested by Rafał.

Setting bit 22 in Reg 22, sel 4 puts the BIU (Bus Interface Unit) into
async mode.

The previous commit was 316cad5c [MIPS:
BCM47XX: make reboot more relaiable]

Signed-off-by: default avatarHauke Mehrtens <hauke@hauke-m.de>
Cc: jogo@openwrt.org
Cc: zajec5@gmail.com
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/7545/


Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent 42e07671

arch/mips/bcm47xx/setup.c

+11 −2
Original line number Diff line number Diff line
@@ -59,12 +59,21 @@ static void bcm47xx_machine_restart(char *command) 
	switch (bcm47xx_bus_type) {

#ifdef CONFIG_BCM47XX_SSB

	case BCM47XX_BUS_TYPE_SSB:

		ssb_watchdog_timer_set(&bcm47xx_bus.ssb, 3);

		if (bcm47xx_bus.ssb.chip_id == 0x4785)

			write_c0_diag4(1 << 22);

		ssb_watchdog_timer_set(&bcm47xx_bus.ssb, 1);

		if (bcm47xx_bus.ssb.chip_id == 0x4785) {

			__asm__ __volatile__(

				".set\tmips3\n\t"

				"sync\n\t"

				"wait\n\t"

				".set\tmips0");

		}

		break;

#endif

#ifdef CONFIG_BCM47XX_BCMA

	case BCM47XX_BUS_TYPE_BCMA:

		bcma_chipco_watchdog_timer_set(&bcm47xx_bus.bcma.bus.drv_cc, 3);

		bcma_chipco_watchdog_timer_set(&bcm47xx_bus.bcma.bus.drv_cc, 1);

		break;

#endif

	}