Merge tag 'gpio-v3.13-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio

specifies the path to the controller. In order to use these GPIOs in Linux

we need to translate them to the Linux GPIO numbers.

The driver can do this by including <linux/acpi_gpio.h> and then calling

acpi_get_gpio(path, gpio). This will return the Linux GPIO number or

negative errno if there was no translation found.

In a simple case of just getting the Linux GPIO number from device

resources one can use acpi_get_gpio_by_index() helper function. It takes

pointer to the device and index of the GpioIo/GpioInt descriptor in the

In case of GpioInt resource an additional call to gpio_to_irq() must be

done before calling request_irq().

Note that the above API is ACPI specific and not recommended for drivers

that need to support non-ACPI systems. The recommended way is to use

the descriptor based GPIO interfaces. The above example looks like this

when converted to the GPIO desc:

	#include <linux/gpio/consumer.h>

	...

	struct gpio_desc *irq_desc, *power_desc;

	irq_desc = gpiod_get_index(dev, NULL, 1);

	if (IS_ERR(irq_desc))

		/* handle error */

	power_desc = gpiod_get_index(dev, NULL, 0);

	if (IS_ERR(power_desc))

		/* handle error */

	/* Now we can use the GPIO descriptors */

See also Documentation/gpio.txt.

Broadcom Kona Family GPIO

=========================

This GPIO driver is used in the following Broadcom SoCs:

  BCM11130, BCM11140, BCM11351, BCM28145, BCM28155

The Broadcom GPIO Controller IP can be configured prior to synthesis to

support up to 8 banks of 32 GPIOs where each bank has its own IRQ. The

GPIO controller only supports edge, not level, triggering of interrupts.

Required properties

-------------------

- compatible: "brcm,bcm11351-gpio", "brcm,kona-gpio"

- reg: Physical base address and length of the controller's registers.

- interrupts: The interrupt outputs from the controller. There is one GPIO

  interrupt per GPIO bank. The number of interrupts listed depends on the

  number of GPIO banks on the SoC. The interrupts must be ordered by bank,

  starting with bank 0. There is always a 1:1 mapping between banks and

  IRQs.

- #gpio-cells: Should be <2>. The first cell is the pin number, the second

  cell is used to specify optional parameters:

  - bit 0 specifies polarity (0 for normal, 1 for inverted)

  See also "gpio-specifier" in .../devicetree/bindings/gpio/gpio.txt.

- #interrupt-cells: Should be <2>. The first cell is the GPIO number. The

  second cell is used to specify flags. The following subset of flags is

  supported:

  - trigger type (bits[1:0]):

      1 = low-to-high edge triggered.

      2 = high-to-low edge triggered.

      3 = low-to-high or high-to-low edge triggered

      Valid values are 1, 2, 3

  See also .../devicetree/bindings/interrupt-controller/interrupts.txt.

- gpio-controller: Marks the device node as a GPIO controller.

- interrupt-controller: Marks the device node as an interrupt controller.

Example:

	gpio: gpio@35003000 {

		compatible = "brcm,bcm11351-gpio", "brcm,kona-gpio";

		reg = <0x35003000 0x800>;

		interrupts =

		       <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH

			GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH

			GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH

			GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH

			GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH

			GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;

		#gpio-cells = <2>;

		#interrupt-cells = <2>;

		gpio-controller;

		interrupt-controller;

	};

* PCF857x-compatible I/O expanders

The PCF857x-compatible chips have "quasi-bidirectional" I/O lines that can be

driven high by a pull-up current source or driven low to ground. This combines

the direction and output level into a single bit per line, which can't be read

back. We can't actually know at initialization time whether a line is configured

(a) as output and driving the signal low/high, or (b) as input and reporting a

low/high value, without knowing the last value written since the chip came out

of reset (if any). The only reliable solution for setting up line direction is

thus to do it explicitly.

Required Properties:

  - compatible: should be one of the following.

    - "maxim,max7328": For the Maxim MAX7378

    - "maxim,max7329": For the Maxim MAX7329

    - "nxp,pca8574": For the NXP PCA8574

    - "nxp,pca8575": For the NXP PCA8575

    - "nxp,pca9670": For the NXP PCA9670

    - "nxp,pca9671": For the NXP PCA9671

    - "nxp,pca9672": For the NXP PCA9672

    - "nxp,pca9673": For the NXP PCA9673

    - "nxp,pca9674": For the NXP PCA9674

    - "nxp,pca9675": For the NXP PCA9675

    - "nxp,pcf8574": For the NXP PCF8574

    - "nxp,pcf8574a": For the NXP PCF8574A

    - "nxp,pcf8575": For the NXP PCF8575

    - "ti,tca9554": For the TI TCA9554

  - reg: I2C slave address.

  - gpio-controller: Marks the device node as a gpio controller.

  - #gpio-cells: Should be 2. The first cell is the GPIO number and the second

    cell specifies GPIO flags, as defined in <dt-bindings/gpio/gpio.h>. Only the

    GPIO_ACTIVE_HIGH and GPIO_ACTIVE_LOW flags are supported.

Optional Properties:

  - lines-initial-states: Bitmask that specifies the initial state of each

  line. When a bit is set to zero, the corresponding line will be initialized to

  the input (pulled-up) state. When the  bit is set to one, the line will be

  initialized the the low-level output state. If the property is not specified

  all lines will be initialized to the input state.

  The I/O expander can detect input state changes, and thus optionally act as

  an interrupt controller. When the expander interrupt line is connected all the

  following properties must be set. For more information please see the

  interrupt controller device tree bindings documentation available at

  Documentation/devicetree/bindings/interrupt-controller/interrupts.txt.

  - interrupt-controller: Identifies the node as an interrupt controller.

  - #interrupt-cells: Number of cells to encode an interrupt source, shall be 2.

  - interrupt-parent: phandle of the parent interrupt controller.

  - interrupts: Interrupt specifier for the controllers interrupt.

Please refer to gpio.txt in this directory for details of the common GPIO

bindings used by client devices.

Example: PCF8575 I/O expander node

	pcf8575: gpio@20 {

		compatible = "nxp,pcf8575";

		reg = <0x20>;

		interrupt-parent = <&irqpin2>;

		interrupts = <3 0>;

		gpio-controller;

		#gpio-cells = <2>;

		interrupt-controller;

		#interrupt-cells = <2>;

	};

F:	Documentation/networking/i40e.txt

F:	drivers/net/ethernet/intel/

INTEL-MID GPIO DRIVER

M:	David Cohen <david.a.cohen@linux.intel.com>

L:	linux-gpio@vger.kernel.org

S:	Maintained

F:	drivers/gpio/gpio-intel-mid.c

INTEL PRO/WIRELESS 2100, 2200BG, 2915ABG NETWORK CONNECTION SUPPORT

M:	Stanislav Yakovlev <stas.yakovlev@gmail.com>

L:	linux-wireless@vger.kernel.org

	select CLKSRC_MMIO

	select CPU_FA526

	select GENERIC_CLOCKEVENTS

	select NEED_MACH_GPIO_H

	help

	  Support for the Cortina Systems Gemini family SoCs

	depends on MMU

	select ARCH_REQUIRE_GPIOLIB

	select CPU_XSCALE

	select NEED_MACH_GPIO_H

	select GPIO_IOP

	select NEED_RET_TO_USER

	select PCI

	select PLAT_IOP

	depends on MMU

	select ARCH_REQUIRE_GPIOLIB

	select CPU_XSCALE

	select NEED_MACH_GPIO_H

	select GPIO_IOP

	select NEED_RET_TO_USER

	select PCI

	select PLAT_IOP

	select GPIO_PXA

	select IRQ_DOMAIN

	select MULTI_IRQ_HANDLER

	select NEED_MACH_GPIO_H

	select PINCTRL

	select PLAT_PXA

	select SPARSE_IRQ

	select GPIO_PXA

	select HAVE_IDE

	select MULTI_IRQ_HANDLER

	select NEED_MACH_GPIO_H

	select PLAT_PXA

	select SPARSE_IRQ

	help