Merge "ARM: dts: msm: Support IPC with PCIe host for mdm9650 EP TTP" (c0ec3008) · Commits · e / devices / android_kernel_xiaomi_markw

arch/arm/boot/dts/qcom/mdm9650-pcie-ep-ttp.dts

+18 −3

Original line number	Diff line number	Diff line
		@@ -13,7 +13,9 @@

		/dts-v1/;

		#include <dt-bindings/gpio/gpio.h>
		#include "mdm9650-v1.1-mtp.dtsi"

		/ {
		model = "Qualcomm Technologies, Inc. MDM 9650 PCIE EP TTP";
		compatible = "qcom,mdm9650-ttp", "qcom,mdm9650", "qcom,ttp";
		@@ -165,7 +167,8 @@

		&pcie_ep {
		status = "ok";
		mdm2apstatus-gpio = <&tlmm_pinmux 85 0>;
		mdm2apstatus-gpio = <&tlmm_pinmux 64 GPIO_ACTIVE_LOW>;
		clkreq-gpio = <&tlmm_pinmux 85 0>;
		};

		&pcie0 {
		@@ -182,13 +185,25 @@

		&pcie0_mdm2apstatus_default {
		mux {
		pins = "gpio85";
		pins = "gpio64";
		function = "gpio";
		};

		config {
		pins = "gpio64";
		drive-strength = <2>;
		bias-pull-up;
		};
		};

		&pcie0_clkreq_default {
		mux {
		pins = "gpio85";
		function = "gpio";
		};
		config {
		pins = "gpio85";
		drive-strength = <2>;
		bias-pull-down;
		bias-pull-up;
		};
		};

+8 −2

Original line number	Diff line number	Diff line
		@@ -760,6 +760,7 @@ static int ep_pcie_get_resources(struct ep_pcie_dev_t *dev,
		char prop_name[MAX_PROP_SIZE];
		const __be32 *prop;
		u32 *clkfreq = NULL;
		enum of_gpio_flags gpio_flags;

		EP_PCIE_DBG(dev, "PCIe V%d\n", dev->rev);

		@@ -868,10 +869,15 @@ static int ep_pcie_get_resources(struct ep_pcie_dev_t *dev,

		for (i = 0; i < EP_PCIE_MAX_GPIO; i++) {
		gpio_info = &dev->gpio[i];
		ret = of_get_named_gpio((&pdev->dev)->of_node,
		gpio_info->name, 0);
		ret = of_get_named_gpio_flags((&pdev->dev)->of_node,
		gpio_info->name, 0, &gpio_flags);
		if (ret >= 0) {
		gpio_info->num = ret;
		if (i == EP_PCIE_GPIO_MDM2AP) {
		gpio_info->init =
		gpio_flags & OF_GPIO_ACTIVE_LOW;
		gpio_info->on = !gpio_info->init;
		}
		ret = 0;
		EP_PCIE_DBG(dev, "GPIO num for %s is %d\n",
		gpio_info->name, gpio_info->num);