Loading arch/arm64/include/asm/cache.h +1 −1 Original line number Diff line number Diff line Loading @@ -18,7 +18,7 @@ #include <asm/cachetype.h> #define L1_CACHE_SHIFT 6 #define L1_CACHE_SHIFT 7 #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) /* Loading arch/arm64/kernel/vmlinux.lds.S +3 −2 Original line number Diff line number Diff line Loading @@ -9,6 +9,7 @@ #include <asm/memory.h> #include <asm/page.h> #include <asm/pgtable.h> #include <asm/cache.h> #include "image.h" Loading Loading @@ -113,7 +114,7 @@ SECTIONS ARM_EXIT_KEEP(EXIT_DATA) } PERCPU_SECTION(64) PERCPU_SECTION(L1_CACHE_BYTES) . = ALIGN(PAGE_SIZE); __init_end = .; Loading @@ -131,7 +132,7 @@ SECTIONS . = ALIGN(PAGE_SIZE); _data = .; _sdata = .; RW_DATA_SECTION(64, PAGE_SIZE, THREAD_SIZE) RW_DATA_SECTION(L1_CACHE_BYTES, PAGE_SIZE, THREAD_SIZE) _edata = .; BSS_SECTION(0, 0, 0) Loading Loading
arch/arm64/include/asm/cache.h +1 −1 Original line number Diff line number Diff line Loading @@ -18,7 +18,7 @@ #include <asm/cachetype.h> #define L1_CACHE_SHIFT 6 #define L1_CACHE_SHIFT 7 #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) /* Loading
arch/arm64/kernel/vmlinux.lds.S +3 −2 Original line number Diff line number Diff line Loading @@ -9,6 +9,7 @@ #include <asm/memory.h> #include <asm/page.h> #include <asm/pgtable.h> #include <asm/cache.h> #include "image.h" Loading Loading @@ -113,7 +114,7 @@ SECTIONS ARM_EXIT_KEEP(EXIT_DATA) } PERCPU_SECTION(64) PERCPU_SECTION(L1_CACHE_BYTES) . = ALIGN(PAGE_SIZE); __init_end = .; Loading @@ -131,7 +132,7 @@ SECTIONS . = ALIGN(PAGE_SIZE); _data = .; _sdata = .; RW_DATA_SECTION(64, PAGE_SIZE, THREAD_SIZE) RW_DATA_SECTION(L1_CACHE_BYTES, PAGE_SIZE, THREAD_SIZE) _edata = .; BSS_SECTION(0, 0, 0) Loading