Loading arch/arm/boot/dts/qcom/msm8937-mdss-pll.dtsi +0 −1 Original line number Diff line number Diff line Loading @@ -53,7 +53,6 @@ }; mdss_dsi1_pll: qcom,mdss_dsi_pll@1a96a00 { status = "disabled"; compatible = "qcom,mdss_dsi_pll_8937"; label = "MDSS DSI 1 PLL"; cell-index = <1>; Loading arch/arm/boot/dts/qcom/msm8937.dtsi +4 −4 Original line number Diff line number Diff line Loading @@ -564,10 +564,10 @@ clock_gcc_mdss: qcom,gcc-mdss@1800000 { compatible = "qcom,gcc-mdss-8937"; clocks = <&mdss_dsi0_pll clk_pixel_clk_src>, <&mdss_dsi0_pll clk_byte_clk_src>, <&mdss_dsi0_pll clk_pixel_clk_src>, <&mdss_dsi0_pll clk_byte_clk_src>; clocks = <&mdss_dsi0_pll clk_dsi_pll0_pixel_clk_src>, <&mdss_dsi0_pll clk_dsi_pll0_byte_clk_src>, <&mdss_dsi1_pll clk_dsi_pll1_pixel_clk_src>, <&mdss_dsi1_pll clk_dsi_pll1_byte_clk_src>; clock-names = "pixel_src", "byte_src", "pclk1_src", "byte1_src"; #clock-cells = <1>; Loading Loading
arch/arm/boot/dts/qcom/msm8937-mdss-pll.dtsi +0 −1 Original line number Diff line number Diff line Loading @@ -53,7 +53,6 @@ }; mdss_dsi1_pll: qcom,mdss_dsi_pll@1a96a00 { status = "disabled"; compatible = "qcom,mdss_dsi_pll_8937"; label = "MDSS DSI 1 PLL"; cell-index = <1>; Loading
arch/arm/boot/dts/qcom/msm8937.dtsi +4 −4 Original line number Diff line number Diff line Loading @@ -564,10 +564,10 @@ clock_gcc_mdss: qcom,gcc-mdss@1800000 { compatible = "qcom,gcc-mdss-8937"; clocks = <&mdss_dsi0_pll clk_pixel_clk_src>, <&mdss_dsi0_pll clk_byte_clk_src>, <&mdss_dsi0_pll clk_pixel_clk_src>, <&mdss_dsi0_pll clk_byte_clk_src>; clocks = <&mdss_dsi0_pll clk_dsi_pll0_pixel_clk_src>, <&mdss_dsi0_pll clk_dsi_pll0_byte_clk_src>, <&mdss_dsi1_pll clk_dsi_pll1_pixel_clk_src>, <&mdss_dsi1_pll clk_dsi_pll1_byte_clk_src>; clock-names = "pixel_src", "byte_src", "pclk1_src", "byte1_src"; #clock-cells = <1>; Loading