Merge "clk: msm: msm8937: Enable using sleep_vote for gpll0" (bb4b019a) · Commits · e / devices / android_kernel_xiaomi_markw

drivers/clk/msm/clock-gcc-8952.c

+17 −1

Original line number	Diff line number	Diff line
		@@ -288,6 +288,21 @@ static struct pll_clk a53ss_c1_pll = {
		},
		};

		static struct pll_vote_clk gpll0_sleep_clk_src = {
		.en_reg = (void __iomem *)APCS_CLOCK_SLEEP_ENA_VOTE,
		.en_mask = BIT(23),
		.status_reg = (void __iomem *)GPLL0_MODE,
		.status_mask = BIT(30),
		.base = &virt_bases[GCC_BASE],
		.c = {
		.parent = &xo_clk_src.c,
		.rate = 800000000,
		.dbg_name = "gpll0_sleep_clk_src",
		.ops = &clk_ops_pll_sleep_vote,
		CLK_INIT(gpll0_sleep_clk_src.c),
		},
		};

		static unsigned int soft_vote_gpll0;

		/* PLL_ACTIVE_FLAG bit of GCC_GPLL0_MODE register
		@@ -320,7 +335,7 @@ static struct pll_vote_clk gpll0_clk_src_8937 = {
		.soft_vote_mask = PLL_SOFT_VOTE_PRIMARY,
		.base = &virt_bases[GCC_BASE],
		.c = {
		.parent = &xo_clk_src.c,
		.parent = &gpll0_sleep_clk_src.c,
		.rate = 800000000,
		.dbg_name = "gpll0_clk_src_8937",
		.ops = &clk_ops_pll_acpu_vote,
		@@ -3831,6 +3846,7 @@ static struct clk_lookup msm_clocks_lookup_8952[] = {
		static struct clk_lookup msm_clocks_lookup_8937[] = {
		CLK_LIST(gpll0_clk_src_8937),
		CLK_LIST(gpll0_ao_clk_src_8937),
		CLK_LIST(gpll0_sleep_clk_src),
		CLK_LIST(esc1_clk_src),
		CLK_LIST(gcc_mdss_esc1_clk),
		CLK_LIST(gcc_dcc_clk),

drivers/clk/msm/clock-pll.c

+54 −0

Original line number	Diff line number	Diff line
		@@ -952,6 +952,60 @@ struct clk_ops clk_ops_pll_acpu_vote = {
		.list_registers = pll_vote_clk_list_registers,
		};


		static int pll_sleep_clk_enable(struct clk *c)
		{
		u32 ena;
		unsigned long flags;
		struct pll_vote_clk *pllv = to_pll_vote_clk(c);

		spin_lock_irqsave(&pll_reg_lock, flags);
		ena = readl_relaxed(PLL_EN_REG(pllv));
		ena &= ~(pllv->en_mask);
		writel_relaxed(ena, PLL_EN_REG(pllv));
		spin_unlock_irqrestore(&pll_reg_lock, flags);
		return 0;
		}

		static void pll_sleep_clk_disable(struct clk *c)
		{
		u32 ena;
		unsigned long flags;
		struct pll_vote_clk *pllv = to_pll_vote_clk(c);

		spin_lock_irqsave(&pll_reg_lock, flags);
		ena = readl_relaxed(PLL_EN_REG(pllv));
		ena \|= pllv->en_mask;
		writel_relaxed(ena, PLL_EN_REG(pllv));
		spin_unlock_irqrestore(&pll_reg_lock, flags);
		}

		static enum handoff pll_sleep_clk_handoff(struct clk *c)
		{
		struct pll_vote_clk *pllv = to_pll_vote_clk(c);

		if (!(readl_relaxed(PLL_EN_REG(pllv)) & pllv->en_mask))
		return HANDOFF_ENABLED_CLK;

		return HANDOFF_DISABLED_CLK;
		}

		/*
		* This .ops is meant to be used by gpll0_sleep_clk_src. The aim is to utilise
		* the h/w feature of sleep enable bit to denote if the PLL can be turned OFF
		* once APPS goes to PC. gpll0_sleep_clk_src will be enabled only if there is a
		* peripheral client using it and disabled if there is none. The current
		* implementation of enable .ops clears the h/w bit of sleep enable while the
		* disable .ops asserts it.
		*/

		struct clk_ops clk_ops_pll_sleep_vote = {
		.enable = pll_sleep_clk_enable,
		.disable = pll_sleep_clk_disable,
		.handoff = pll_sleep_clk_handoff,
		.list_registers = pll_vote_clk_list_registers,
		};

		static void __set_fsm_mode(void __iomem *mode_reg,
		u32 bias_count, u32 lock_count)
		{

include/dt-bindings/clock/msm-clocks-8952.h

+1 −0

Original line number	Diff line number	Diff line
		@@ -22,6 +22,7 @@
		#define clk_gpll0_ao_clk_src_8937 0x923c7546
		#define clk_gpll0_clk_src 0x5933b69f
		#define clk_gpll0_ao_clk_src 0x6b2fb034
		#define clk_gpll0_sleep_clk_src 0x4f89fcf0
		#define clk_gpll0_out_main 0x850fecec
		#define clk_gpll0_out_aux 0x64e55d63
		#define clk_gpll0_misc 0xe06ee816

include/dt-bindings/clock/msm-clocks-hwio-8952.h

+1 −0

Original line number	Diff line number	Diff line
		@@ -212,6 +212,7 @@
		#define SYSTEM_MM_NOC_CMD_RCGR 0x3D000
		#define USB_FS_BCR 0x3F000

		#define APCS_CLOCK_SLEEP_ENA_VOTE 0x45008
		#define BYTE1_CMD_RCGR 0x4D0B0
		#define ESC1_CMD_RCGR 0x4D0A8
		#define PCLK1_CMD_RCGR 0x4D0B8

include/soc/qcom/clock-pll.h

+1 −0

Original line number	Diff line number	Diff line
		@@ -102,6 +102,7 @@ struct pll_vote_clk {

		extern struct clk_ops clk_ops_pll_vote;
		extern struct clk_ops clk_ops_pll_acpu_vote;
		extern struct clk_ops clk_ops_pll_sleep_vote;

		/* Soft voting values */
		#define PLL_SOFT_VOTE_PRIMARY BIT(0)