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Commit b75c6733 authored by Vikram Mulukutla's avatar Vikram Mulukutla
Browse files

clk: msm: Switch HMSS CPR clock to active-only resources 



Use the active-only version of the CXO clock as
the parent of the HMSS CPR RCG, and remove its
vote on CX (CX is guaranteed to be at least SVS2
as long as at least one CPU is awake).

Change-Id: Iba1e75b8d4b4de134d598aa01b7ba3b3f3f040d3
Signed-off-by: default avatarVikram Mulukutla <markivx@codeaurora.org>
parent c049a981

drivers/clk/msm/clock-gcc-8996.c

+2 −5
Original line number Diff line number Diff line
@@ -37,6 +37,7 @@ static void __iomem *virt_base; 
static void __iomem *virt_dbgbase;



#define cxo_clk_src_source_val 0

#define cxo_clk_src_ao_source_val 0

#define gpll0_out_main_source_val 1

#define gpll4_out_main_source_val 5
@@ -1295,7 +1296,7 @@ static struct rcg_clk gp3_clk_src = { 
};



static struct clk_freq_tbl ftbl_hmss_rbcpr_clk_src[] = {

	F(  19200000,     cxo_clk_src,    1,    0,     0),

	F(  19200000,     cxo_clk_src_ao,    1,    0,     0),

	F_END

};
@@ -1308,7 +1309,6 @@ static struct rcg_clk hmss_rbcpr_clk_src = { 
	.c = {

		.dbg_name = "hmss_rbcpr_clk_src",

		.ops = &clk_ops_rcg,

		VDD_DIG_FMAX_MAP1(LOWER, 19200000),

		CLK_INIT(hmss_rbcpr_clk_src.c),

	},

};
@@ -3601,9 +3601,6 @@ static struct clk_lookup msm_clocks_gcc_8996_v2[] = { 


static void msm_clocks_gcc_8996_v2_fixup(void)

{

	hmss_rbcpr_clk_src.c.fmax[VDD_DIG_NOMINAL] = 50000000;

	hmss_rbcpr_clk_src.c.fmax[VDD_DIG_HIGH] = 50000000;



	pcie_aux_clk_src.c.fmax[VDD_DIG_LOWER] = 9600000;

	pcie_aux_clk_src.c.fmax[VDD_DIG_LOW] = 19200000;

	pcie_aux_clk_src.c.fmax[VDD_DIG_NOMINAL] = 19200000;