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Commit b3dd642b authored by raghavendra ambadas's avatar raghavendra ambadas Committed by Gerrit - the friendly Code Review server
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Revert "Revert "msm: mdss: enable pll regulator during phy on sequence""



This reverts commit 0a4917a2.
This change is causing corruption issue on msm8996 dual dsi
cmd mode panel.

Change-Id: Iba316b22c7cc211c384f5b5204e0b6f11d169d8a
Signed-off-by: default avatarRaghavendra Ambadas <rambad@codeaurora.org>
parent 8f09bb72
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+10 −1
Original line number Diff line number Diff line
@@ -899,8 +899,11 @@ static void mdss_dsi_8996_phy_power_off(
{
	int ln;
	void __iomem *base;
	u32 data;

	MIPI_OUTP(ctrl->phy_io.base + DSIPHY_CMN_CTRL_0, 0x7f);
	/* Turn off PLL power */
	data = MIPI_INP(ctrl->phy_io.base + DSIPHY_CMN_CTRL_0);
	MIPI_OUTP(ctrl->phy_io.base + DSIPHY_CMN_CTRL_0, data & ~BIT(7));

	/* 4 lanes + clk lane configuration */
	for (ln = 0; ln < 5; ln++) {
@@ -956,6 +959,7 @@ static void mdss_dsi_8996_phy_power_on(
	void __iomem *base;
	struct mdss_dsi_phy_ctrl *pd;
	char *ip;
	u32 data;

	pd = &(((ctrl->panel_data).panel_info.mipi).dsi_phy_db);

@@ -975,6 +979,10 @@ static void mdss_dsi_8996_phy_power_on(
	}

	mdss_dsi_8996_phy_regulator_enable(ctrl);

	/* Turn on PLL power */
	data = MIPI_INP(ctrl->phy_io.base + DSIPHY_CMN_CTRL_0);
	MIPI_OUTP(ctrl->phy_io.base + DSIPHY_CMN_CTRL_0, data | BIT(7));
}

static void mdss_dsi_phy_power_on(
@@ -1078,6 +1086,7 @@ static void mdss_dsi_8996_phy_config(struct mdss_dsi_ctrl_pdata *ctrl)
			mdss_dsi_8996_pll_source_standalone(ctrl);
	}

	MIPI_OUTP(ctrl->phy_io.base + DSIPHY_CMN_CTRL_0, 0x7f);
	wmb(); /* make sure registers committed */
}