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Commit 0a4917a2 authored by Vishnuvardhan Prodduturi's avatar Vishnuvardhan Prodduturi
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Revert "msm: mdss: enable pll regulator during phy on sequence" 



This reverts commit 32461b78 ("
msm: mdss: enable pll regulator during phy on sequence").This commit
is causing suspend/resume failure, revert it until issue is root caused.

Change-Id: I76ff5affef32ca7dead433b49b636045a13b1dc5
Signed-off-by: default avatarVishnuvardhan Prodduturi <vproddut@codeaurora.org>
parent c44279d0

drivers/video/msm/mdss/msm_mdss_io_8974.c

+1 −10
Original line number Diff line number Diff line
@@ -899,11 +899,8 @@ static void mdss_dsi_8996_phy_power_off( 
{

	int ln;

	void __iomem *base;

	u32 data;



	/* Turn off PLL power */

	data = MIPI_INP(ctrl->phy_io.base + DSIPHY_CMN_CTRL_0);

	MIPI_OUTP(ctrl->phy_io.base + DSIPHY_CMN_CTRL_0, data & ~BIT(7));

	MIPI_OUTP(ctrl->phy_io.base + DSIPHY_CMN_CTRL_0, 0x7f);



	/* 4 lanes + clk lane configuration */

	for (ln = 0; ln < 5; ln++) {
@@ -959,7 +956,6 @@ static void mdss_dsi_8996_phy_power_on( 
	void __iomem *base;

	struct mdss_dsi_phy_ctrl *pd;

	char *ip;

	u32 data;



	pd = &(((ctrl->panel_data).panel_info.mipi).dsi_phy_db);
@@ -979,10 +975,6 @@ static void mdss_dsi_8996_phy_power_on( 
	}



	mdss_dsi_8996_phy_regulator_enable(ctrl);



	/* Turn on PLL power */

	data = MIPI_INP(ctrl->phy_io.base + DSIPHY_CMN_CTRL_0);

	MIPI_OUTP(ctrl->phy_io.base + DSIPHY_CMN_CTRL_0, data | BIT(7));

}



static void mdss_dsi_phy_power_on(
@@ -1086,7 +1078,6 @@ static void mdss_dsi_8996_phy_config(struct mdss_dsi_ctrl_pdata *ctrl) 
			mdss_dsi_8996_pll_source_standalone(ctrl);

	}



	MIPI_OUTP(ctrl->phy_io.base + DSIPHY_CMN_CTRL_0, 0x7f);

	wmb(); /* make sure registers committed */

}