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Commit a50808b6 authored by dmitry pervushin's avatar dmitry pervushin Committed by Russell King
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[ARM] 5538/1: Freescale STMP: 378n registers definition 



Add register definitions for Freescale STMP 378n boards

Signed-off-by: default avatardmitry pervushin <dpervushin@embeddedalley.com>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent fc3fdfd6

arch/arm/mach-stmp378x/include/mach/regs-audioin.h

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/*

 * stmp378x: AUDIOIN register definitions

 *

 * Copyright (c) 2008 Freescale Semiconductor

 * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License as published by

 * the Free Software Foundation; either version 2 of the License, or

 * (at your option) any later version.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 *

 * You should have received a copy of the GNU General Public License

 * along with this program; if not, write to the Free Software

 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA

 */

#define REGS_AUDIOIN_BASE	(STMP3XXX_REGS_BASE + 0x4C000)

#define REGS_AUDIOIN_PHYS	0x8004C000

#define REGS_AUDIOIN_SIZE	0x2000



#define HW_AUDIOIN_CTRL		0x0

#define BM_AUDIOIN_CTRL_RUN	0x00000001

#define BP_AUDIOIN_CTRL_RUN	0

#define BM_AUDIOIN_CTRL_FIFO_ERROR_IRQ_EN	0x00000002

#define BM_AUDIOIN_CTRL_FIFO_OVERFLOW_IRQ	0x00000004

#define BM_AUDIOIN_CTRL_FIFO_UNDERFLOW_IRQ	0x00000008

#define BM_AUDIOIN_CTRL_WORD_LENGTH	0x00000020

#define BM_AUDIOIN_CTRL_CLKGATE	0x40000000

#define BM_AUDIOIN_CTRL_SFTRST	0x80000000



#define HW_AUDIOIN_STAT		0x10



#define HW_AUDIOIN_ADCSRR	0x20



#define HW_AUDIOIN_ADCVOLUME	0x30

#define BM_AUDIOIN_ADCVOLUME_VOLUME_RIGHT	0x000000FF

#define BP_AUDIOIN_ADCVOLUME_VOLUME_RIGHT	0

#define BM_AUDIOIN_ADCVOLUME_VOLUME_LEFT	0x00FF0000

#define BP_AUDIOIN_ADCVOLUME_VOLUME_LEFT	16



#define HW_AUDIOIN_ADCDEBUG	0x40



#define HW_AUDIOIN_ADCVOL	0x50

#define BM_AUDIOIN_ADCVOL_GAIN_RIGHT	0x0000000F

#define BP_AUDIOIN_ADCVOL_GAIN_RIGHT	0

#define BM_AUDIOIN_ADCVOL_SELECT_RIGHT	0x00000030

#define BP_AUDIOIN_ADCVOL_SELECT_RIGHT	4

#define BM_AUDIOIN_ADCVOL_GAIN_LEFT	0x00000F00

#define BP_AUDIOIN_ADCVOL_GAIN_LEFT	8

#define BM_AUDIOIN_ADCVOL_SELECT_LEFT	0x00003000

#define BP_AUDIOIN_ADCVOL_SELECT_LEFT	12

#define BM_AUDIOIN_ADCVOL_MUTE	0x01000000



#define HW_AUDIOIN_MICLINE	0x60



#define HW_AUDIOIN_ANACLKCTRL	0x70

#define BM_AUDIOIN_ANACLKCTRL_CLKGATE	0x80000000



#define HW_AUDIOIN_DATA		0x80

arch/arm/mach-stmp378x/include/mach/regs-audioout.h

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/*

 * stmp378x: AUDIOOUT register definitions

 *

 * Copyright (c) 2008 Freescale Semiconductor

 * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License as published by

 * the Free Software Foundation; either version 2 of the License, or

 * (at your option) any later version.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 *

 * You should have received a copy of the GNU General Public License

 * along with this program; if not, write to the Free Software

 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA

 */

#define REGS_AUDIOOUT_BASE	(STMP3XXX_REGS_BASE + 0x48000)

#define REGS_AUDIOOUT_PHYS	0x80048000

#define REGS_AUDIOOUT_SIZE	0x2000



#define HW_AUDIOOUT_CTRL	0x0

#define BM_AUDIOOUT_CTRL_RUN	0x00000001

#define BP_AUDIOOUT_CTRL_RUN	0

#define BM_AUDIOOUT_CTRL_FIFO_ERROR_IRQ_EN	0x00000002

#define BM_AUDIOOUT_CTRL_FIFO_OVERFLOW_IRQ	0x00000004

#define BM_AUDIOOUT_CTRL_FIFO_UNDERFLOW_IRQ	0x00000008

#define BM_AUDIOOUT_CTRL_WORD_LENGTH	0x00000040

#define BM_AUDIOOUT_CTRL_CLKGATE	0x40000000

#define BM_AUDIOOUT_CTRL_SFTRST	0x80000000



#define HW_AUDIOOUT_STAT	0x10



#define HW_AUDIOOUT_DACSRR	0x20

#define BM_AUDIOOUT_DACSRR_SRC_FRAC	0x00001FFF

#define BP_AUDIOOUT_DACSRR_SRC_FRAC	0

#define BM_AUDIOOUT_DACSRR_SRC_INT	0x001F0000

#define BP_AUDIOOUT_DACSRR_SRC_INT	16

#define BM_AUDIOOUT_DACSRR_SRC_HOLD	0x07000000

#define BP_AUDIOOUT_DACSRR_SRC_HOLD	24

#define BM_AUDIOOUT_DACSRR_BASEMULT	0x70000000

#define BP_AUDIOOUT_DACSRR_BASEMULT	28



#define HW_AUDIOOUT_DACVOLUME	0x30

#define BM_AUDIOOUT_DACVOLUME_MUTE_RIGHT	0x00000100

#define BM_AUDIOOUT_DACVOLUME_MUTE_LEFT	0x01000000

#define BM_AUDIOOUT_DACVOLUME_EN_ZCD	0x02000000



#define HW_AUDIOOUT_DACDEBUG	0x40



#define HW_AUDIOOUT_HPVOL	0x50

#define BM_AUDIOOUT_HPVOL_MUTE	0x01000000

#define BM_AUDIOOUT_HPVOL_EN_MSTR_ZCD	0x02000000



#define HW_AUDIOOUT_PWRDN	0x70

#define BM_AUDIOOUT_PWRDN_HEADPHONE	0x00000001

#define BP_AUDIOOUT_PWRDN_HEADPHONE	0

#define BM_AUDIOOUT_PWRDN_CAPLESS	0x00000010

#define BM_AUDIOOUT_PWRDN_ADC	0x00000100

#define BM_AUDIOOUT_PWRDN_DAC	0x00001000

#define BM_AUDIOOUT_PWRDN_RIGHT_ADC	0x00010000

#define BM_AUDIOOUT_PWRDN_SPEAKER	0x01000000



#define HW_AUDIOOUT_REFCTRL	0x80

#define BM_AUDIOOUT_REFCTRL_VAG_VAL	0x000000F0

#define BP_AUDIOOUT_REFCTRL_VAG_VAL	4

#define BM_AUDIOOUT_REFCTRL_ADC_REFVAL	0x00000F00

#define BP_AUDIOOUT_REFCTRL_ADC_REFVAL	8

#define BM_AUDIOOUT_REFCTRL_ADJ_VAG	0x00001000

#define BM_AUDIOOUT_REFCTRL_ADJ_ADC	0x00002000

#define BM_AUDIOOUT_REFCTRL_BIAS_CTRL	0x00030000

#define BP_AUDIOOUT_REFCTRL_BIAS_CTRL	16

#define BM_AUDIOOUT_REFCTRL_LOW_PWR	0x00080000

#define BM_AUDIOOUT_REFCTRL_VBG_ADJ	0x00700000

#define BP_AUDIOOUT_REFCTRL_VBG_ADJ	20

#define BM_AUDIOOUT_REFCTRL_XTAL_BGR_BIAS	0x01000000

#define BM_AUDIOOUT_REFCTRL_RAISE_REF	0x02000000



#define HW_AUDIOOUT_ANACTRL	0x90

#define BM_AUDIOOUT_ANACTRL_HP_CLASSAB	0x00000010

#define BM_AUDIOOUT_ANACTRL_HP_HOLD_GND	0x00000020



#define HW_AUDIOOUT_TEST	0xA0

#define BM_AUDIOOUT_TEST_HP_I1_ADJ	0x00C00000

#define BP_AUDIOOUT_TEST_HP_I1_ADJ	22



#define HW_AUDIOOUT_BISTCTRL	0xB0



#define HW_AUDIOOUT_BISTSTAT0	0xC0



#define HW_AUDIOOUT_BISTSTAT1	0xD0



#define HW_AUDIOOUT_ANACLKCTRL	0xE0

#define BM_AUDIOOUT_ANACLKCTRL_CLKGATE	0x80000000



#define HW_AUDIOOUT_DATA	0xF0



#define HW_AUDIOOUT_SPEAKERCTRL	0x100

#define BM_AUDIOOUT_SPEAKERCTRL_MUTE	0x01000000



#define HW_AUDIOOUT_VERSION	0x200

arch/arm/mach-stmp378x/include/mach/regs-bch.h

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/*

 * stmp378x: BCH register definitions

 *

 * Copyright (c) 2008 Freescale Semiconductor

 * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License as published by

 * the Free Software Foundation; either version 2 of the License, or

 * (at your option) any later version.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 *

 * You should have received a copy of the GNU General Public License

 * along with this program; if not, write to the Free Software

 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA

 */

#define REGS_BCH_BASE	(STMP3XXX_REGS_BASE + 0xA000)

#define REGS_BCH_PHYS	0x8000A000

#define REGS_BCH_SIZE	0x2000



#define HW_BCH_CTRL		0x0

#define BM_BCH_CTRL_COMPLETE_IRQ	0x00000001

#define BP_BCH_CTRL_COMPLETE_IRQ	0

#define BM_BCH_CTRL_COMPLETE_IRQ_EN	0x00000100



#define HW_BCH_STATUS0		0x10

#define BM_BCH_STATUS0_UNCORRECTABLE	0x00000004

#define BM_BCH_STATUS0_CORRECTED	0x00000008

#define BM_BCH_STATUS0_STATUS_BLK0	0x0000FF00

#define BP_BCH_STATUS0_STATUS_BLK0	8

#define BM_BCH_STATUS0_COMPLETED_CE	0x000F0000

#define BP_BCH_STATUS0_COMPLETED_CE	16



#define HW_BCH_LAYOUTSELECT	0x70



#define HW_BCH_FLASH0LAYOUT0	0x80

#define BM_BCH_FLASH0LAYOUT0_DATA0_SIZE	0x00000FFF

#define BP_BCH_FLASH0LAYOUT0_DATA0_SIZE	0

#define BM_BCH_FLASH0LAYOUT0_ECC0	0x0000F000

#define BP_BCH_FLASH0LAYOUT0_ECC0	12

#define BM_BCH_FLASH0LAYOUT0_META_SIZE	0x00FF0000

#define BP_BCH_FLASH0LAYOUT0_META_SIZE	16

#define BM_BCH_FLASH0LAYOUT0_NBLOCKS	0xFF000000

#define BP_BCH_FLASH0LAYOUT0_NBLOCKS	24

#define BM_BCH_FLASH0LAYOUT1_DATAN_SIZE	0x00000FFF

#define BP_BCH_FLASH0LAYOUT1_DATAN_SIZE	0

#define BM_BCH_FLASH0LAYOUT1_ECCN	0x0000F000

#define BP_BCH_FLASH0LAYOUT1_ECCN	12

#define BM_BCH_FLASH0LAYOUT1_PAGE_SIZE	0xFFFF0000

#define BP_BCH_FLASH0LAYOUT1_PAGE_SIZE	16



#define HW_BCH_BLOCKNAME	0x150

arch/arm/mach-stmp378x/include/mach/regs-dcp.h

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/*

 * stmp378x: DCP register definitions

 *

 * Copyright (c) 2008 Freescale Semiconductor

 * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License as published by

 * the Free Software Foundation; either version 2 of the License, or

 * (at your option) any later version.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 *

 * You should have received a copy of the GNU General Public License

 * along with this program; if not, write to the Free Software

 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA

 */

#define REGS_DCP_BASE	(STMP3XXX_REGS_BASE + 0x28000)

#define REGS_DCP_PHYS	0x80028000

#define REGS_DCP_SIZE	0x2000



#define HW_DCP_CTRL		0x0

#define BM_DCP_CTRL_CHANNEL_INTERRUPT_ENABLE	0x000000FF

#define BP_DCP_CTRL_CHANNEL_INTERRUPT_ENABLE	0

#define BM_DCP_CTRL_ENABLE_CONTEXT_CACHING	0x00400000

#define BM_DCP_CTRL_GATHER_RESIDUAL_WRITES	0x00800000

#define BM_DCP_CTRL_CLKGATE	0x40000000

#define BM_DCP_CTRL_SFTRST	0x80000000



#define HW_DCP_STAT		0x10

#define BM_DCP_STAT_IRQ		0x0000000F

#define BP_DCP_STAT_IRQ		0



#define HW_DCP_CHANNELCTRL	0x20

#define BM_DCP_CHANNELCTRL_ENABLE_CHANNEL	0x000000FF

#define BP_DCP_CHANNELCTRL_ENABLE_CHANNEL	0



#define HW_DCP_CONTEXT		0x50

#define BM_DCP_PACKET1_INTERRUPT	0x00000001

#define BP_DCP_PACKET1_INTERRUPT	0

#define BM_DCP_PACKET1_DECR_SEMAPHORE	0x00000002

#define BM_DCP_PACKET1_CHAIN	0x00000004

#define BM_DCP_PACKET1_CHAIN_CONTIGUOUS	0x00000008

#define BM_DCP_PACKET1_ENABLE_CIPHER	0x00000020

#define BM_DCP_PACKET1_ENABLE_HASH	0x00000040

#define BM_DCP_PACKET1_CIPHER_ENCRYPT	0x00000100

#define BM_DCP_PACKET1_CIPHER_INIT	0x00000200

#define BM_DCP_PACKET1_OTP_KEY	0x00000400

#define BM_DCP_PACKET1_PAYLOAD_KEY	0x00000800

#define BM_DCP_PACKET1_HASH_INIT	0x00001000

#define BM_DCP_PACKET1_HASH_TERM	0x00002000

#define BM_DCP_PACKET2_CIPHER_SELECT	0x0000000F

#define BP_DCP_PACKET2_CIPHER_SELECT	0

#define BM_DCP_PACKET2_CIPHER_MODE	0x000000F0

#define BP_DCP_PACKET2_CIPHER_MODE	4

#define BM_DCP_PACKET2_KEY_SELECT	0x0000FF00

#define BP_DCP_PACKET2_KEY_SELECT	8

#define BM_DCP_PACKET2_HASH_SELECT	0x000F0000

#define BP_DCP_PACKET2_HASH_SELECT	16

#define BM_DCP_PACKET2_CIPHER_CFG	0xFF000000

#define BP_DCP_PACKET2_CIPHER_CFG	24



#define HW_DCP_CH0CMDPTR	(0x100 + 0 * 0x40)

#define HW_DCP_CH1CMDPTR	(0x100 + 1 * 0x40)

#define HW_DCP_CH2CMDPTR	(0x100 + 2 * 0x40)

#define HW_DCP_CH3CMDPTR	(0x100 + 3 * 0x40)



#define HW_DCP_CHnCMDPTR	0x100



#define HW_DCP_CH0SEMA		(0x110 + 0 * 0x40)

#define HW_DCP_CH1SEMA		(0x110 + 1 * 0x40)

#define HW_DCP_CH2SEMA		(0x110 + 2 * 0x40)

#define HW_DCP_CH3SEMA		(0x110 + 3 * 0x40)



#define HW_DCP_CHnSEMA		0x110

#define BM_DCP_CHnSEMA_INCREMENT	0x000000FF

#define BP_DCP_CHnSEMA_INCREMENT	0



#define HW_DCP_CH0STAT		(0x120 + 0 * 0x40)

#define HW_DCP_CH1STAT		(0x120 + 1 * 0x40)

#define HW_DCP_CH2STAT		(0x120 + 2 * 0x40)

#define HW_DCP_CH3STAT		(0x120 + 3 * 0x40)



#define HW_DCP_CHnSTAT		0x120

arch/arm/mach-stmp378x/include/mach/regs-digctl.h

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/*

 * stmp378x: DIGCTL register definitions

 *

 * Copyright (c) 2008 Freescale Semiconductor

 * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License as published by

 * the Free Software Foundation; either version 2 of the License, or

 * (at your option) any later version.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 *

 * You should have received a copy of the GNU General Public License

 * along with this program; if not, write to the Free Software

 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA

 */

#define REGS_DIGCTL_BASE	(STMP3XXX_REGS_BASE + 0x1C000)

#define REGS_DIGCTL_PHYS	0x8001C000

#define REGS_DIGCTL_SIZE	0x2000



#define HW_DIGCTL_CTRL		0x0

#define BM_DIGCTL_CTRL_USB_CLKGATE	0x00000004



#define HW_DIGCTL_ARMCACHE	0x2B0

#define BM_DIGCTL_ARMCACHE_ITAG_SS	0x00000003

#define BP_DIGCTL_ARMCACHE_ITAG_SS	0

#define BM_DIGCTL_ARMCACHE_DTAG_SS	0x00000030

#define BP_DIGCTL_ARMCACHE_DTAG_SS	4

#define BM_DIGCTL_ARMCACHE_CACHE_SS	0x00000300

#define BP_DIGCTL_ARMCACHE_CACHE_SS	8

#define BM_DIGCTL_ARMCACHE_DRTY_SS	0x00003000

#define BP_DIGCTL_ARMCACHE_DRTY_SS	12

#define BM_DIGCTL_ARMCACHE_VALID_SS	0x00030000

#define BP_DIGCTL_ARMCACHE_VALID_SS	16