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Commit a2a5c5a0 authored by Amir Levy's avatar Amir Levy
Browse files

msm: ipa3: update Routing/Filtering IC for hashable tables 



Updated the routing and filtering immediate commands to support
hashable and non-hashable tables. Also updated the routing and
filtering initialization to use the updated IC. Besides the empty
routing table updated to 64 bit to fit the IPAv3 structure.

Change-Id: Id8c9b0b5b4146fd4b5d34c2fb8703f10429ca224
Signed-off-by: default avatarGhanim Fodi <gfodi@codeaurora.org>
Signed-off-by: default avatarAmir Levy <alevy@codeaurora.org>
parent 7f9a390b

drivers/platform/msm/ipa/ipa_v3/ipa.c

+111 −38
Original line number Diff line number Diff line
@@ -41,9 +41,6 @@ 
			       x == IPA_MODE_MOBILE_AP_WLAN)

#define IPA_CNOC_CLK_RATE (75 * 1000 * 1000UL)

#define IPA_A5_MUX_HEADER_LENGTH (8)

#define IPA_ROUTING_RULE_BYTE_SIZE (4)

#define IPA_STATUS_CLEAR_OFST (0x3f28)

#define IPA_STATUS_CLEAR_SIZE (32)



#define IPA_AGGR_MAX_STR_LENGTH (10)
@@ -1680,7 +1677,8 @@ int _ipa_init_sram_v3_0(void) 


	phys_addr = ipa3_ctx->ipa_wrapper_base +

		ipa3_ctx->ctrl->ipa_reg_base_ofst +

		IPA_SRAM_SW_FIRST_v3;

		IPA_SRAM_DIRECT_ACCESS_N_OFST_v3_0(

			ipa3_ctx->smem_restricted_bytes / 4);



	ipa_sram_mmio = ioremap(phys_addr,

		ipa3_ctx->smem_sz - ipa3_ctx->smem_restricted_bytes);
@@ -1696,7 +1694,7 @@ int _ipa_init_sram_v3_0(void) 
		IPA_MEM_PART(v4_flt_nhash_ofst) - 4);

	ipa3_sram_set_canary(ipa_sram_mmio, IPA_MEM_PART(v4_flt_nhash_ofst));

	ipa3_sram_set_canary(ipa_sram_mmio, IPA_MEM_PART(v6_flt_hash_ofst) - 4);

	ipa3_sram_set_canary(ipa_sram_mmio, IPA_MEM_PART(v6_flt_nhash_ofst));

	ipa3_sram_set_canary(ipa_sram_mmio, IPA_MEM_PART(v6_flt_hash_ofst));

	ipa3_sram_set_canary(ipa_sram_mmio,

		IPA_MEM_PART(v6_flt_nhash_ofst) - 4);

	ipa3_sram_set_canary(ipa_sram_mmio, IPA_MEM_PART(v6_flt_nhash_ofst));
@@ -1815,7 +1813,7 @@ int _ipa_init_rt4_v3(void) 
	struct ipa3_desc desc = { 0 };

	struct ipa3_mem_buffer mem;

	struct ipa3_ip_v4_routing_init v4_cmd;

	u32 *entry;

	u64 *entry;

	int i;

	int rc = 0;
@@ -1840,12 +1838,18 @@ int _ipa_init_rt4_v3(void) 
	}



	desc.opcode = IPA_IP_V4_ROUTING_INIT;

	v4_cmd.ipv4_rules_addr = mem.phys_base;

	v4_cmd.size_ipv4_rules = mem.size;

	v4_cmd.ipv4_addr = ipa3_ctx->smem_restricted_bytes +

	v4_cmd.hash_rules_addr = mem.phys_base;

	v4_cmd.hash_rules_size = mem.size;

	v4_cmd.hash_local_addr = ipa3_ctx->smem_restricted_bytes +

		IPA_MEM_PART(v4_rt_hash_ofst);

	v4_cmd.nhash_rules_addr = mem.phys_base;

	v4_cmd.nhash_rules_size = mem.size;

	v4_cmd.nhash_local_addr = ipa3_ctx->smem_restricted_bytes +

		IPA_MEM_PART(v4_rt_nhash_ofst);

	IPADBG("putting Routing IPv4 rules to phys 0x%x",

				v4_cmd.ipv4_addr);

	IPADBG("putting hashable routing IPv4 rules to phys 0x%x\n",

				v4_cmd.hash_local_addr);

	IPADBG("putting non-hashable routing IPv4 rules to phys 0x%x\n",

				v4_cmd.nhash_local_addr);



	desc.pyld = &v4_cmd;

	desc.len = sizeof(struct ipa3_ip_v4_routing_init);
@@ -1871,7 +1875,7 @@ int _ipa_init_rt6_v3(void) 
	struct ipa3_desc desc = { 0 };

	struct ipa3_mem_buffer mem;

	struct ipa3_ip_v6_routing_init v6_cmd;

	u32 *entry;

	u64 *entry;

	int i;

	int rc = 0;
@@ -1896,12 +1900,18 @@ int _ipa_init_rt6_v3(void) 
	}



	desc.opcode = IPA_IP_V6_ROUTING_INIT;

	v6_cmd.ipv6_rules_addr = mem.phys_base;

	v6_cmd.size_ipv6_rules = mem.size;

	v6_cmd.ipv6_addr = ipa3_ctx->smem_restricted_bytes +

	v6_cmd.hash_rules_addr = mem.phys_base;

	v6_cmd.hash_rules_size = mem.size;

	v6_cmd.hash_local_addr = ipa3_ctx->smem_restricted_bytes +

		IPA_MEM_PART(v6_rt_hash_ofst);

	v6_cmd.nhash_rules_addr = mem.phys_base;

	v6_cmd.nhash_rules_size = mem.size;

	v6_cmd.nhash_local_addr = ipa3_ctx->smem_restricted_bytes +

		IPA_MEM_PART(v6_rt_nhash_ofst);

	IPADBG("putting Routing IPv6 rules to phys 0x%x",

				v6_cmd.ipv6_addr);

	IPADBG("putting hashable routing IPv6 rules to phys 0x%x\n",

				v6_cmd.hash_local_addr);

	IPADBG("putting non-hashable routing IPv6 rules to phys 0x%x\n",

				v6_cmd.nhash_local_addr);



	desc.pyld = &v6_cmd;

	desc.len = sizeof(struct ipa3_ip_v6_routing_init);
@@ -1927,11 +1937,32 @@ int _ipa_init_flt4_v3(void) 
	struct ipa3_desc desc = { 0 };

	struct ipa3_mem_buffer mem;

	struct ipa3_ip_v4_filter_init v4_cmd;

	u32 *entry;

	u64 *entry;

	int i;

	int rc = 0;

	int flt_spc;



	flt_spc = IPA_MEM_PART(v4_flt_hash_size);

	/* bitmap word */

	flt_spc -= IPA_HW_TBL_HDR_WIDTH;

	flt_spc /= IPA_HW_TBL_HDR_WIDTH;

	if (ipa3_ctx->ep_flt_num > flt_spc) {

		IPAERR("space for v4 hash flt hdr is too small\n");

		WARN_ON(1);

		return -EPERM;

	}

	flt_spc = IPA_MEM_PART(v4_flt_nhash_size);

	/* bitmap word */

	flt_spc -= IPA_HW_TBL_HDR_WIDTH;

	flt_spc /= IPA_HW_TBL_HDR_WIDTH;

	if (ipa3_ctx->ep_flt_num > flt_spc) {

		IPAERR("space for v4 non-hash flt hdr is too small\n");

		WARN_ON(1);

		return -EPERM;

	}



	mem.size = IPA_MEM_PART(v4_flt_nhash_size);

	/* +1 for filtering header bitmap */

	mem.size = (ipa3_ctx->ep_flt_num + 1) * IPA_HW_TBL_HDR_WIDTH;

	mem.base = dma_alloc_coherent(ipa3_ctx->pdev, mem.size, &mem.phys_base,

			GFP_KERNEL);

	if (!mem.base) {
@@ -1941,21 +1972,28 @@ int _ipa_init_flt4_v3(void) 


	entry = mem.base;



	*entry = ((0xFFFFF << 1) | 0x1);

	*entry = ((u64)ipa3_ctx->ep_flt_bitmap) << 1;

	IPADBG("v4 flt bitmap 0x%llx\n", *entry);

	entry++;



	for (i = 0; i <= ipa3_ctx->ipa_num_pipes; i++) {

	for (i = 0; i <= ipa3_ctx->ep_flt_num; i++) {

		*entry = ipa3_ctx->empty_rt_tbl_mem.phys_base;

		entry++;

	}



	desc.opcode = IPA_IP_V4_FILTER_INIT;

	v4_cmd.ipv4_rules_addr = mem.phys_base;

	v4_cmd.size_ipv4_rules = mem.size;

	v4_cmd.ipv4_addr = ipa3_ctx->smem_restricted_bytes +

	v4_cmd.hash_rules_addr = mem.phys_base;

	v4_cmd.hash_rules_size = mem.size;

	v4_cmd.hash_local_addr = ipa3_ctx->smem_restricted_bytes +

		IPA_MEM_PART(v4_flt_hash_ofst);

	v4_cmd.nhash_rules_addr = mem.phys_base;

	v4_cmd.nhash_rules_size = mem.size;

	v4_cmd.nhash_local_addr = ipa3_ctx->smem_restricted_bytes +

		IPA_MEM_PART(v4_flt_nhash_ofst);

	IPADBG("putting Filtering IPv4 rules to phys 0x%x",

				v4_cmd.ipv4_addr);

	IPADBG("putting hashable filtering IPv4 rules to phys 0x%x\n",

				v4_cmd.hash_local_addr);

	IPADBG("putting non-hashable filtering IPv4 rules to phys 0x%x\n",

				v4_cmd.nhash_local_addr);



	desc.pyld = &v4_cmd;

	desc.len = sizeof(struct ipa3_ip_v4_filter_init);
@@ -1981,11 +2019,32 @@ int _ipa_init_flt6_v3(void) 
	struct ipa3_desc desc = { 0 };

	struct ipa3_mem_buffer mem;

	struct ipa3_ip_v6_filter_init v6_cmd;

	u32 *entry;

	u64 *entry;

	int i;

	int rc = 0;

	int flt_spc;



	flt_spc = IPA_MEM_PART(v6_flt_hash_size);

	/* bitmap word */

	flt_spc -= IPA_HW_TBL_HDR_WIDTH;

	flt_spc /= IPA_HW_TBL_HDR_WIDTH;

	if (ipa3_ctx->ep_flt_num > flt_spc) {

		IPAERR("space for v6 hash flt hdr is too small\n");

		WARN_ON(1);

		return -EPERM;

	}

	flt_spc = IPA_MEM_PART(v6_flt_nhash_size);

	/* bitmap word */

	flt_spc -= IPA_HW_TBL_HDR_WIDTH;

	flt_spc /= IPA_HW_TBL_HDR_WIDTH;

	if (ipa3_ctx->ep_flt_num > flt_spc) {

		IPAERR("space for v6 non-hash flt hdr is too small\n");

		WARN_ON(1);

		return -EPERM;

	}



	mem.size = IPA_MEM_PART(v6_flt_nhash_size);

	/* +1 for filtering header bitmap */

	mem.size = (ipa3_ctx->ep_flt_num + 1) * IPA_HW_TBL_HDR_WIDTH;

	mem.base = dma_alloc_coherent(ipa3_ctx->pdev, mem.size, &mem.phys_base,

			GFP_KERNEL);

	if (!mem.base) {
@@ -1995,21 +2054,28 @@ int _ipa_init_flt6_v3(void) 


	entry = mem.base;



	*entry = (0xFFFFF << 1) | 0x1;

	*entry = ((u64)ipa3_ctx->ep_flt_bitmap) << 1;

	IPADBG("v6 flt bitmap 0x%llx\n", *entry);

	entry++;



	for (i = 0; i <= ipa3_ctx->ipa_num_pipes; i++) {

	for (i = 0; i <= ipa3_ctx->ep_flt_num; i++) {

		*entry = ipa3_ctx->empty_rt_tbl_mem.phys_base;

		entry++;

	}



	desc.opcode = IPA_IP_V6_FILTER_INIT;

	v6_cmd.ipv6_rules_addr = mem.phys_base;

	v6_cmd.size_ipv6_rules = mem.size;

	v6_cmd.ipv6_addr = ipa3_ctx->smem_restricted_bytes +

	v6_cmd.hash_rules_addr = mem.phys_base;

	v6_cmd.hash_rules_size = mem.size;

	v6_cmd.hash_local_addr = ipa3_ctx->smem_restricted_bytes +

		IPA_MEM_PART(v6_flt_hash_ofst);

	v6_cmd.nhash_rules_addr = mem.phys_base;

	v6_cmd.nhash_rules_size = mem.size;

	v6_cmd.nhash_local_addr = ipa3_ctx->smem_restricted_bytes +

		IPA_MEM_PART(v6_flt_nhash_ofst);

	IPADBG("putting Filtering IPv6 rules to phys 0x%x",

				v6_cmd.ipv6_addr);

	IPADBG("putting hashable filtering IPv6 rules to phys 0x%x\n",

				v6_cmd.hash_local_addr);

	IPADBG("putting non-hashable filtering IPv6 rules to phys 0x%x\n",

				v6_cmd.nhash_local_addr);



	desc.pyld = &v6_cmd;

	desc.len = sizeof(struct ipa3_ip_v6_filter_init);
@@ -2030,7 +2096,7 @@ static int ipa3_setup_apps_pipes(void) 
	struct ipa_sys_connect_params sys_in;

	int result = 0;



	/* CMD OUT (A5->IPA) */

	/* CMD OUT (AP->IPA) */

	memset(&sys_in, 0, sizeof(struct ipa_sys_connect_params));

	sys_in.client = IPA_CLIENT_APPS_CMD_PROD;

	sys_in.desc_fifo_sz = IPA_SYS_DESC_FIFO_SZ;
@@ -2105,7 +2171,7 @@ static int ipa3_setup_apps_pipes(void) 
		goto fail_schedule_delayed_work;

	}



	/* LAN-WAN OUT (A5->IPA) */

	/* LAN-WAN OUT (AP->IPA) */

	memset(&sys_in, 0, sizeof(struct ipa_sys_connect_params));

	sys_in.client = IPA_CLIENT_APPS_LAN_WAN_PROD;

	sys_in.desc_fifo_sz = IPA_SYS_TX_DATA_DESC_FIFO_SZ;
@@ -3199,7 +3265,7 @@ static int ipa3_init(const struct ipa3_plat_drv_res *resource_p, 
	 * setup an empty routing table in system memory, this will be used

	 * to delete a routing table cleanly and safely

	 */

	ipa3_ctx->empty_rt_tbl_mem.size = IPA_ROUTING_RULE_BYTE_SIZE;

	ipa3_ctx->empty_rt_tbl_mem.size = IPA_HW_TBL_WIDTH;



	ipa3_ctx->empty_rt_tbl_mem.base =

		dma_alloc_coherent(ipa3_ctx->pdev,
@@ -3212,6 +3278,13 @@ static int ipa3_init(const struct ipa3_plat_drv_res *resource_p, 
		result = -ENOMEM;

		goto fail_apps_pipes;

	}

	if (ipa3_ctx->empty_rt_tbl_mem.phys_base &

		IPA_HW_TBL_SYSADDR_ALIGNMENT) {

		IPAERR("Empty routing table buf is not address aligned 0x%x\n",

				ipa3_ctx->empty_rt_tbl_mem.phys_base);

		result = -EFAULT;

		goto fail_empty_rt_tbl;

	}

	memset(ipa3_ctx->empty_rt_tbl_mem.base, 0,

			ipa3_ctx->empty_rt_tbl_mem.size);

	IPADBG("empty routing table was allocated in system memory");

drivers/platform/msm/ipa/ipa_v3/ipa_hw_defs.h

+54 −26
Original line number Diff line number Diff line
@@ -96,54 +96,82 @@ struct ipa3_rt_rule_hw_hdr { 


/**

 * struct ipa3_ip_v4_filter_init - IPA_IP_V4_FILTER_INIT command payload

 * @ipv4_rules_addr: address of ipv4 rules

 * @size_ipv4_rules: size of the above

 * @ipv4_addr: ipv4 address

 * @hash_rules_addr: System memory address of IPv4 hashable rules

 * @hash_rules_size: Size in bytes of the hashable rules

 * @hash_local_addr: Shared memory address of IPv4 hashable rules

 * @nhash_rules_size: Size in bytes of the non-hashable rules

 * @nhash_local_addr: Shared memory address of IPv4 non-hashable rules

 * @rsvd: reserved

 * @nhash_rules_addr: System memory address of IPv4 non-hashable rules

 */

struct ipa3_ip_v4_filter_init {

	u64 ipv4_rules_addr:32;

	u64 size_ipv4_rules:12;

	u64 ipv4_addr:16;

	u64 rsvd:4;

	u64 hash_rules_addr:64;

	u64 hash_rules_size:12;

	u64 hash_local_addr:16;

	u64 nhash_rules_size:12;

	u64 nhash_local_addr:16;

	u64 rsvd:8;

	u64 nhash_rules_addr:64;

};



/**

 * struct ipa3_ip_v6_filter_init - IPA_IP_V6_FILTER_INIT command payload

 * @ipv6_rules_addr: address of ipv6 rules

 * @size_ipv6_rules: size of the above

 * @ipv6_addr: ipv6 address

 * @hash_rules_addr: System memory address of IPv6 hashable rules

 * @hash_rules_size: Size in bytes of the hashable rules

 * @hash_local_addr: Shared memory address of IPv6 hashable rules

 * @nhash_rules_size: Size in bytes of the non-hashable rules

 * @nhash_local_addr: Shared memory address of IPv6 non-hashable rules

 * @rsvd: reserved

 * @nhash_rules_addr: System memory address of IPv6 non-hashable rules

 */

struct ipa3_ip_v6_filter_init {

	u64 ipv6_rules_addr:32;

	u64 size_ipv6_rules:16;

	u64 ipv6_addr:16;

	u64 hash_rules_addr:64;

	u64 hash_rules_size:12;

	u64 hash_local_addr:16;

	u64 nhash_rules_size:12;

	u64 nhash_local_addr:16;

	u64 rsvd:8;

	u64 nhash_rules_addr:64;

};



/**

 * struct ipa3_ip_v4_routing_init - IPA_IP_V4_ROUTING_INIT command payload

 * @ipv4_rules_addr: address of ipv4 rules

 * @size_ipv4_rules: size of the above

 * @ipv4_addr: ipv4 address

 * @hash_rules_addr: System memory address of IPv4 hashable rules

 * @hash_rules_size: Size in bytes of the hashable rules

 * @hash_local_addr: Shared memory address of IPv4 hashable rules

 * @nhash_rules_size: Size in bytes of the non-hashable rules

 * @nhash_local_addr: Shared memory address of IPv4 non-hashable rules

 * @rsvd: reserved

 * @nhash_rules_addr: System memory address of IPv4 non-hashable rules

 */

struct ipa3_ip_v4_routing_init {

	u64 ipv4_rules_addr:32;

	u64 size_ipv4_rules:12;

	u64 ipv4_addr:16;

	u64 rsvd:4;

	u64 hash_rules_addr:64;

	u64 hash_rules_size:12;

	u64 hash_local_addr:16;

	u64 nhash_rules_size:12;

	u64 nhash_local_addr:16;

	u64 rsvd:8;

	u64 nhash_rules_addr:64;

};



/**

 * struct ipa3_ip_v6_routing_init - IPA_IP_V6_ROUTING_INIT command payload

 * @ipv6_rules_addr: address of ipv6 rules

 * @size_ipv6_rules: size of the above

 * @ipv6_addr: ipv6 address

 * @hash_rules_addr: System memory address of IPv6 hashable rules

 * @hash_rules_size: Size in bytes of the hashable rules

 * @hash_local_addr: Shared memory address of IPv6 hashable rules

 * @nhash_rules_size: Size in bytes of the non-hashable rules

 * @nhash_local_addr: Shared memory address of IPv6 non-hashable rules

 * @rsvd: reserved

 * @nhash_rules_addr: System memory address of IPv6 non-hashable rules

 */

struct ipa3_ip_v6_routing_init {

	u64 ipv6_rules_addr:32;

	u64 size_ipv6_rules:16;

	u64 ipv6_addr:16;

	u64 hash_rules_addr:64;

	u64 hash_rules_size:12;

	u64 hash_local_addr:16;

	u64 nhash_rules_size:12;

	u64 nhash_local_addr:16;

	u64 rsvd:8;

	u64 nhash_rules_addr:64;

};



/**

drivers/platform/msm/ipa/ipa_v3/ipa_i.h

+4 −0
Original line number Diff line number Diff line
@@ -133,6 +133,10 @@ 
	(((start_ofst) + 127) & ~127)

#define IPA_RT_FLT_HW_RULE_BUF_SIZE	(128)



#define IPA_HW_TBL_WIDTH (8)

#define IPA_HW_TBL_SYSADDR_ALIGNMENT (0x7)

#define IPA_HW_TBL_HDR_WIDTH (8)



#define IPA_HDR_PROC_CTX_TABLE_ALIGNMENT_BYTE 8

#define IPA_HDR_PROC_CTX_TABLE_ALIGNMENT(start_ofst) \

	(((start_ofst) + IPA_HDR_PROC_CTX_TABLE_ALIGNMENT_BYTE - 1) & \

drivers/platform/msm/ipa/ipa_v3/ipa_reg.h

+0 −1
Original line number Diff line number Diff line
@@ -63,7 +63,6 @@ 
#define IPA_FILTER_FILTER_EN_SHFT 0x0



#define IPA_SRAM_DIRECT_ACCESS_N_OFST_v3_0(n) (0x00007000 + 0x4 * (n))

#define IPA_SRAM_SW_FIRST_v3 0x00007000

#define IPA_ROUTE_ROUTE_DEF_HDR_TABLE_BMSK 0x40

#define IPA_COMP_CFG_OFST 0x0000003C