Loading arch/arm/boot/dts/qcom/msmgold-coresight.dtsi +111 −38 Original line number Diff line number Diff line Loading @@ -34,6 +34,61 @@ clock-names = "core_clk", "core_a_clk"; }; tpiu: tpiu@6020000 { compatible = "arm,coresight-tpiu"; reg = <0x6020000 0x1000>, <0x1100000 0xb0000>; reg-names = "tpiu-base", "nidnt-base"; coresight-id = <1>; coresight-name = "coresight-tpiu"; coresight-nr-inports = <1>; pinctrl-names = "sdcard", "trace", "swduart", "swdtrc", "jtag", "spmi"; /* NIDnT */ pinctrl-0 = <&qdsd_clk_sdcard &qdsd_cmd_sdcard &qdsd_data0_sdcard &qdsd_data1_sdcard &qdsd_data2_sdcard &qdsd_data3_sdcard>; pinctrl-1 = <&qdsd_clk_trace &qdsd_cmd_trace &qdsd_data0_trace &qdsd_data1_trace &qdsd_data2_trace &qdsd_data3_trace>; pinctrl-2 = <&qdsd_cmd_swduart &qdsd_data0_swduart &qdsd_data1_swduart &qdsd_data2_swduart &qdsd_data3_swduart>; pinctrl-3 = <&qdsd_clk_swdtrc &qdsd_cmd_swdtrc &qdsd_data0_swdtrc &qdsd_data1_swdtrc &qdsd_data2_swdtrc &qdsd_data3_swdtrc>; pinctrl-4 = <&qdsd_cmd_jtag &qdsd_data0_jtag &qdsd_data1_jtag &qdsd_data2_jtag &qdsd_data3_jtag>; pinctrl-5 = <&qdsd_clk_spmi &qdsd_cmd_spmi &qdsd_data0_spmi &qdsd_data3_spmi>; qcom,nidnthw; qcom,nidnt-swduart; qcom,nidnt-swdtrc; qcom,nidnt-jtag; qcom,nidnt-spmi; nidnt-gpio = <67>; nidnt-gpio-polarity = <1>; interrupts = <0 82 0>; interrupt-names = "nidnt-irq"; vdd-supply = <&pmgold_l11>; qcom,vdd-voltage-level = <2950000 2950000>; qcom,vdd-current-level = <15000 400000>; vdd-io-supply = <&pmgold_l12>; qcom,vdd-io-voltage-level = <2950000 2950000>; qcom,vdd-io-current-level = <200 50000>; clocks = <&clock_gcc clk_qdss_clk>, <&clock_gcc clk_qdss_a_clk>; clock-names = "core_clk", "core_a_clk"; }; replicator: replicator@6026000 { compatible = "qcom,coresight-replicator"; reg = <0x6026000 0x1000>; Loading @@ -42,8 +97,8 @@ coresight-id = <2>; coresight-name = "coresight-replicator"; coresight-nr-inports = <1>; coresight-outports = <0>; coresight-child-list = <&tmc_etr>; coresight-outports = <0 1>; coresight-child-list = <&tmc_etr &tpiu>; coresight-child-ports = <0 0>; clocks = <&clock_gcc clk_qdss_clk>, Loading Loading @@ -251,7 +306,7 @@ <0x9280000 0x180000>; reg-names = "stm-base", "stm-data-base"; coresight-id = <18>; coresight-id = <14>; coresight-name = "coresight-stm"; coresight-nr-inports = <0>; coresight-outports = <0>; Loading @@ -268,7 +323,7 @@ reg = <0x6010000 0x1000>; reg-names = "cti-base"; coresight-id = <19>; coresight-id = <15>; coresight-name = "coresight-cti0"; coresight-nr-inports = <0>; Loading @@ -282,7 +337,7 @@ reg = <0x6011000 0x1000>; reg-names = "cti-base"; coresight-id = <20>; coresight-id = <16>; coresight-name = "coresight-cti1"; coresight-nr-inports = <0>; Loading @@ -296,7 +351,7 @@ reg = <0x6012000 0x1000>; reg-names = "cti-base"; coresight-id = <21>; coresight-id = <17>; coresight-name = "coresight-cti2"; coresight-nr-inports = <0>; Loading @@ -310,7 +365,7 @@ reg = <0x6013000 0x1000>; reg-names = "cti-base"; coresight-id = <22>; coresight-id = <18>; coresight-name = "coresight-cti3"; coresight-nr-inports = <0>; Loading @@ -324,7 +379,7 @@ reg = <0x6014000 0x1000>; reg-names = "cti-base"; coresight-id = <23>; coresight-id = <19>; coresight-name = "coresight-cti4"; coresight-nr-inports = <0>; Loading @@ -338,7 +393,7 @@ reg = <0x6015000 0x1000>; reg-names = "cti-base"; coresight-id = <24>; coresight-id = <20>; coresight-name = "coresight-cti5"; coresight-nr-inports = <0>; Loading @@ -352,7 +407,7 @@ reg = <0x6016000 0x1000>; reg-names = "cti-base"; coresight-id = <25>; coresight-id = <21>; coresight-name = "coresight-cti6"; coresight-nr-inports = <0>; Loading @@ -366,7 +421,7 @@ reg = <0x6017000 0x1000>; reg-names = "cti-base"; coresight-id = <26>; coresight-id = <22>; coresight-name = "coresight-cti7"; coresight-nr-inports = <0>; Loading @@ -380,7 +435,7 @@ reg = <0x6018000 0x1000>; reg-names = "cti-base"; coresight-id = <27>; coresight-id = <23>; coresight-name = "coresight-cti8"; coresight-nr-inports = <0>; Loading @@ -394,7 +449,7 @@ reg = <0x6019000 0x1000>; reg-names = "cti-base"; coresight-id = <28>; coresight-id = <24>; coresight-name = "coresight-cti9"; coresight-nr-inports = <0>; Loading @@ -408,7 +463,7 @@ reg = <0x601a000 0x1000>; reg-names = "cti-base"; coresight-id = <29>; coresight-id = <25>; coresight-name = "coresight-cti10"; coresight-nr-inports = <0>; Loading @@ -422,7 +477,7 @@ reg = <0x601b000 0x1000>; reg-names = "cti-base"; coresight-id = <30>; coresight-id = <26>; coresight-name = "coresight-cti11"; coresight-nr-inports = <0>; Loading @@ -436,7 +491,7 @@ reg = <0x601c000 0x1000>; reg-names = "cti-base"; coresight-id = <31>; coresight-id = <27>; coresight-name = "coresight-cti12"; coresight-nr-inports = <0>; Loading @@ -450,7 +505,7 @@ reg = <0x601d000 0x1000>; reg-names = "cti-base"; coresight-id = <32>; coresight-id = <28>; coresight-name = "coresight-cti13"; coresight-nr-inports = <0>; Loading @@ -464,7 +519,7 @@ reg = <0x601e000 0x1000>; reg-names = "cti-base"; coresight-id = <33>; coresight-id = <29>; coresight-name = "coresight-cti14"; coresight-nr-inports = <0>; Loading @@ -478,7 +533,7 @@ reg = <0x601f000 0x1000>; reg-names = "cti-base"; coresight-id = <34>; coresight-id = <30>; coresight-name = "coresight-cti15"; coresight-nr-inports = <0>; Loading @@ -492,7 +547,7 @@ reg = <0x61b8000 0x1000>; reg-names = "cti-base"; coresight-id = <35>; coresight-id = <31>; coresight-name = "coresight-cti-cpu0"; coresight-nr-inports = <0>; coresight-cti-cpu = <&CPU0>; Loading @@ -507,7 +562,7 @@ reg = <0x61b9000 0x1000>; reg-names = "cti-base"; coresight-id = <36>; coresight-id = <32>; coresight-name = "coresight-cti-cpu1"; coresight-nr-inports = <0>; coresight-cti-cpu = <&CPU1>; Loading @@ -522,7 +577,7 @@ reg = <0x61ba000 0x1000>; reg-names = "cti-base"; coresight-id = <37>; coresight-id = <33>; coresight-name = "coresight-cti-cpu2"; coresight-nr-inports = <0>; coresight-cti-cpu = <&CPU2>; Loading @@ -537,7 +592,7 @@ reg = <0x61bb000 0x1000>; reg-names = "cti-base"; coresight-id = <38>; coresight-id = <34>; coresight-name = "coresight-cti-cpu3"; coresight-nr-inports = <0>; coresight-cti-cpu = <&CPU3>; Loading @@ -552,7 +607,7 @@ reg = <0x6124000 0x1000>; reg-names = "cti-base"; coresight-id = <43>; coresight-id = <35>; coresight-name = "coresight-cti-modem-cpu0"; coresight-nr-inports = <0>; Loading @@ -567,7 +622,7 @@ reg = <0x6139000 0x1000>; reg-names = "cti-base"; coresight-id = <44>; coresight-id = <36>; coresight-name = "coresight-cti-wcn-cpu0"; coresight-nr-inports = <0>; Loading @@ -582,7 +637,7 @@ reg = <0x6134000 0x1000>; reg-names = "cti-base"; coresight-id = <45>; coresight-id = <37>; coresight-name = "coresight-cti-video-cpu0"; coresight-nr-inports = <0>; Loading @@ -597,7 +652,7 @@ reg = <0x613c000 0x1000>; reg-names = "cti-base"; coresight-id = <46>; coresight-id = <38>; coresight-name = "coresight-cti-audio-cpu0"; coresight-nr-inports = <0>; Loading @@ -612,7 +667,7 @@ reg = <0x610c000 0x1000>; reg-names = "cti-base"; coresight-id = <47>; coresight-id = <39>; coresight-name = "coresight-cti-rpm-cpu0"; coresight-nr-inports = <0>; Loading @@ -625,7 +680,7 @@ wcn_etm0 { compatible = "qcom,coresight-remote-etm"; coresight-id = <48>; coresight-id = <40>; coresight-name = "coresight-wcn-etm0"; coresight-nr-inports = <0>; coresight-outports = <0>; Loading @@ -638,7 +693,7 @@ rpm_etm0 { compatible = "qcom,coresight-remote-etm"; coresight-id = <49>; coresight-id = <41>; coresight-name = "coresight-rpm-etm0"; coresight-nr-inports = <0>; coresight-outports = <0>; Loading @@ -652,7 +707,7 @@ audio_etm0 { compatible = "qcom,coresight-remote-etm"; coresight-id = <50>; coresight-id = <42>; coresight-name = "coresight-audio-etm0"; coresight-nr-inports = <0>; coresight-outports = <0>; Loading @@ -665,7 +720,7 @@ modem_etm0 { compatible = "qcom,coresight-remote-etm"; coresight-id = <51>; coresight-id = <43>; coresight-name = "coresight-modem-etm0"; coresight-nr-inports = <0>; coresight-outports = <0>; Loading @@ -680,7 +735,7 @@ reg = <0x6001000 0x1000>; reg-names = "csr-base"; coresight-id = <52>; coresight-id = <44>; coresight-name = "coresight-csr"; coresight-nr-inports = <0>; qcom,blk-size = <1>; Loading @@ -695,7 +750,7 @@ reg = <0x6108000 0x1000>; reg-names = "dbgui-base"; coresight-id = <53>; coresight-id = <45>; coresight-name = "coresight-dbgui"; coresight-nr-inports = <0>; coresight-outports = <0>; Loading @@ -716,7 +771,7 @@ reg = <0x6003000 0x1000>; reg-names = "tpda-base"; coresight-id = <54>; coresight-id = <46>; coresight-name = "coresight-tpda"; coresight-nr-inports = <2>; coresight-outports = <0>; Loading @@ -736,7 +791,7 @@ reg = <0x6110000 0x1000>; reg-names = "tpdm-base"; coresight-id = <55>; coresight-id = <47>; coresight-name = "coresight-tpdm-dcc"; coresight-nr-inports = <1>; coresight-outports = <0>; Loading @@ -763,7 +818,7 @@ "mm-wrapper-mux", "mm-wrapper-lockaccess", "usbbam-mux", "blsp-mux"; coresight-id = <56>; coresight-id = <48>; coresight-name = "coresight-hwevent"; coresight-nr-inports = <0>; Loading @@ -779,8 +834,26 @@ <0xa600c 0x4>; reg-names = "fuse-base", "nidnt-fuse-base", "qpdi-fuse-base"; coresight-id = <57>; coresight-id = <49>; coresight-name = "coresight-fuse"; coresight-nr-inports = <0>; }; qpdi: qpdi@1941000 { compatible = "qcom,coresight-qpdi"; reg = <0x1941000 0x4>; reg-names = "qpdi-base"; coresight-id = <50>; coresight-name = "coresight-qpdi"; coresight-nr-inports = <0>; vdd-supply = <&pmgold_l11>; qcom,vdd-voltage-level = <2950000 2950000>; qcom,vdd-current-level = <15000 400000>; vdd-io-supply = <&pmgold_l12>; qcom,vdd-io-voltage-level = <2950000 2950000>; qcom,vdd-io-current-level = <200 50000>; }; }; arch/arm/boot/dts/qcom/msmgold-pinctrl.dtsi +242 −0 Original line number Diff line number Diff line Loading @@ -104,5 +104,247 @@ }; }; }; pmx_qdsd_clk { qdsd_clk_sdcard: clk_sdcard { config { pins = "qdsd_clk"; bias-disable; /* NO pull */ drive-strength = <16>; /* 16 MA */ }; }; qdsd_clk_trace: clk_trace { config { pins = "qdsd_clk"; bias-pull-down; /* pull down */ drive-strength = <2>; /* 2 MA */ }; }; qdsd_clk_swdtrc: clk_swdtrc { config { pins = "qdsd_clk"; bias-pull-down; /* pull down */ drive-strength = <2>; /* 2 MA */ }; }; qdsd_clk_spmi: clk_spmi { config { pins = "qdsd_clk"; bias-pull-down; /* pull down */ drive-strength = <2>; /* 2 MA */ }; }; }; pmx_qdsd_cmd { qdsd_cmd_sdcard: cmd_sdcard { config { pins = "qdsd_cmd"; bias-pull-down; /* pull down */ drive-strength = <8>; /* 8 MA */ }; }; qdsd_cmd_trace: cmd_trace { config { pins = "qdsd_cmd"; bias-pull-down; /* pull down */ drive-strength = <2>; /* 2 MA */ }; }; qdsd_cmd_swduart: cmd_uart { config { pins = "qdsd_cmd"; bias-pull-up; /* pull up */ drive-strength = <2>; /* 2 MA */ }; }; qdsd_cmd_swdtrc: cmd_swdtrc { config { pins = "qdsd_cmd"; bias-pull-up; /* pull up */ drive-strength = <2>; /* 2 MA */ }; }; qdsd_cmd_jtag: cmd_jtag { config { pins = "qdsd_cmd"; bias-disable; /* NO pull */ drive-strength = <8>; /* 8 MA */ }; }; qdsd_cmd_spmi: cmd_spmi { config { pins = "qdsd_cmd"; bias-pull-down; /* pull down */ drive-strength = <10>; /* 10 MA */ }; }; }; pmx_qdsd_data0 { qdsd_data0_sdcard: data0_sdcard { config { pins = "qdsd_data0"; bias-pull-down; /* pull down */ drive-strength = <8>; /* 8 MA */ }; }; qdsd_data0_trace: data0_trace { config { pins = "qdsd_data0"; bias-pull-down; /* pull down */ drive-strength = <8>; /* 8 MA */ }; }; qdsd_data0_swduart: data0_uart { config { pins = "qdsd_data0"; bias-pull-down; /* pull down */ drive-strength = <2>; /* 2 MA */ }; }; qdsd_data0_swdtrc: data0_swdtrc { config { pins = "qdsd_data0"; bias-pull-down; /* pull down */ drive-strength = <2>; /* 2 MA */ }; }; qdsd_data0_jtag: data0_jtag { config { pins = "qdsd_data0"; bias-pull-up; /* pull up */ drive-strength = <2>; /* 2 MA */ }; }; qdsd_data0_spmi: data0_spmi { config { pins = "qdsd_data0"; bias-pull-down; /* pull down */ drive-strength = <2>; /* 2 MA */ }; }; }; pmx_qdsd_data1 { qdsd_data1_sdcard: data1_sdcard { config { pins = "qdsd_data1"; bias-pull-down; /* pull down */ drive-strength = <8>; /* 8 MA */ }; }; qdsd_data1_trace: data1_trace { config { pins = "qdsd_data1"; bias-pull-down; /* pull down */ drive-strength = <8>; /* 8 MA */ }; }; qdsd_data1_swduart: data1_uart { config { pins = "qdsd_data1"; bias-pull-down; /* pull down */ drive-strength = <2>; /* 2 MA */ }; }; qdsd_data1_swdtrc: data1_swdtrc { config { pins = "qdsd_data1"; bias-pull-down; /* pull down */ drive-strength = <2>; /* 2 MA */ }; }; qdsd_data1_jtag: data1_jtag { config { pins = "qdsd_data1"; bias-pull-down; /* pull down */ drive-strength = <2>; /* 2 MA */ }; }; }; pmx_qdsd_data2 { qdsd_data2_sdcard: data2_sdcard { config { pins = "qdsd_data2"; bias-pull-down; /* pull down */ drive-strength = <8>; /* 8 MA */ }; }; qdsd_data2_trace: data2_trace { config { pins = "qdsd_data2"; bias-pull-down; /* pull down */ drive-strength = <8>; /* 8 MA */ }; }; qdsd_data2_swduart: data2_uart { config { pins = "qdsd_data2"; bias-pull-down; /* pull down */ drive-strength = <2>; /* 2 MA */ }; }; qdsd_data2_swdtrc: data2_swdtrc { config { pins = "qdsd_data2"; bias-pull-down; /* pull down */ drive-strength = <2>; /* 2 MA */ }; }; qdsd_data2_jtag: data2_jtag { config { pins = "qdsd_data2"; bias-pull-up; /* pull up */ drive-strength = <8>; /* 8 MA */ }; }; }; pmx_qdsd_data3 { qdsd_data3_sdcard: data3_sdcard { config { pins = "qdsd_data3"; bias-pull-down; /* pull down */ drive-strength = <8>; /* 8 MA */ }; }; qdsd_data3_trace: data3_trace { config { pins = "qdsd_data3"; bias-pull-down; /* pull down */ drive-strength = <8>; /* 8 MA */ }; }; qdsd_data3_swduart: data3_uart { config { pins = "qdsd_data3"; bias-pull-up; /* pull up */ drive-strength = <2>; /* 2 MA */ }; }; qdsd_data3_swdtrc: data3_swdtrc { config { pins = "qdsd_data3"; bias-pull-up; /* pull up */ drive-strength = <2>; /* 2 MA */ }; }; qdsd_data3_jtag: data3_jtag { config { pins = "qdsd_data3"; bias-pull-up; /* pull up */ drive-strength = <2>; /* 2 MA */ }; }; qdsd_data3_spmi: data3_spmi { config { pins = "qdsd_data3"; bias-pull-down; /* pull down */ drive-strength = <8>; /* 8 MA */ }; }; }; }; }; Loading
arch/arm/boot/dts/qcom/msmgold-coresight.dtsi +111 −38 Original line number Diff line number Diff line Loading @@ -34,6 +34,61 @@ clock-names = "core_clk", "core_a_clk"; }; tpiu: tpiu@6020000 { compatible = "arm,coresight-tpiu"; reg = <0x6020000 0x1000>, <0x1100000 0xb0000>; reg-names = "tpiu-base", "nidnt-base"; coresight-id = <1>; coresight-name = "coresight-tpiu"; coresight-nr-inports = <1>; pinctrl-names = "sdcard", "trace", "swduart", "swdtrc", "jtag", "spmi"; /* NIDnT */ pinctrl-0 = <&qdsd_clk_sdcard &qdsd_cmd_sdcard &qdsd_data0_sdcard &qdsd_data1_sdcard &qdsd_data2_sdcard &qdsd_data3_sdcard>; pinctrl-1 = <&qdsd_clk_trace &qdsd_cmd_trace &qdsd_data0_trace &qdsd_data1_trace &qdsd_data2_trace &qdsd_data3_trace>; pinctrl-2 = <&qdsd_cmd_swduart &qdsd_data0_swduart &qdsd_data1_swduart &qdsd_data2_swduart &qdsd_data3_swduart>; pinctrl-3 = <&qdsd_clk_swdtrc &qdsd_cmd_swdtrc &qdsd_data0_swdtrc &qdsd_data1_swdtrc &qdsd_data2_swdtrc &qdsd_data3_swdtrc>; pinctrl-4 = <&qdsd_cmd_jtag &qdsd_data0_jtag &qdsd_data1_jtag &qdsd_data2_jtag &qdsd_data3_jtag>; pinctrl-5 = <&qdsd_clk_spmi &qdsd_cmd_spmi &qdsd_data0_spmi &qdsd_data3_spmi>; qcom,nidnthw; qcom,nidnt-swduart; qcom,nidnt-swdtrc; qcom,nidnt-jtag; qcom,nidnt-spmi; nidnt-gpio = <67>; nidnt-gpio-polarity = <1>; interrupts = <0 82 0>; interrupt-names = "nidnt-irq"; vdd-supply = <&pmgold_l11>; qcom,vdd-voltage-level = <2950000 2950000>; qcom,vdd-current-level = <15000 400000>; vdd-io-supply = <&pmgold_l12>; qcom,vdd-io-voltage-level = <2950000 2950000>; qcom,vdd-io-current-level = <200 50000>; clocks = <&clock_gcc clk_qdss_clk>, <&clock_gcc clk_qdss_a_clk>; clock-names = "core_clk", "core_a_clk"; }; replicator: replicator@6026000 { compatible = "qcom,coresight-replicator"; reg = <0x6026000 0x1000>; Loading @@ -42,8 +97,8 @@ coresight-id = <2>; coresight-name = "coresight-replicator"; coresight-nr-inports = <1>; coresight-outports = <0>; coresight-child-list = <&tmc_etr>; coresight-outports = <0 1>; coresight-child-list = <&tmc_etr &tpiu>; coresight-child-ports = <0 0>; clocks = <&clock_gcc clk_qdss_clk>, Loading Loading @@ -251,7 +306,7 @@ <0x9280000 0x180000>; reg-names = "stm-base", "stm-data-base"; coresight-id = <18>; coresight-id = <14>; coresight-name = "coresight-stm"; coresight-nr-inports = <0>; coresight-outports = <0>; Loading @@ -268,7 +323,7 @@ reg = <0x6010000 0x1000>; reg-names = "cti-base"; coresight-id = <19>; coresight-id = <15>; coresight-name = "coresight-cti0"; coresight-nr-inports = <0>; Loading @@ -282,7 +337,7 @@ reg = <0x6011000 0x1000>; reg-names = "cti-base"; coresight-id = <20>; coresight-id = <16>; coresight-name = "coresight-cti1"; coresight-nr-inports = <0>; Loading @@ -296,7 +351,7 @@ reg = <0x6012000 0x1000>; reg-names = "cti-base"; coresight-id = <21>; coresight-id = <17>; coresight-name = "coresight-cti2"; coresight-nr-inports = <0>; Loading @@ -310,7 +365,7 @@ reg = <0x6013000 0x1000>; reg-names = "cti-base"; coresight-id = <22>; coresight-id = <18>; coresight-name = "coresight-cti3"; coresight-nr-inports = <0>; Loading @@ -324,7 +379,7 @@ reg = <0x6014000 0x1000>; reg-names = "cti-base"; coresight-id = <23>; coresight-id = <19>; coresight-name = "coresight-cti4"; coresight-nr-inports = <0>; Loading @@ -338,7 +393,7 @@ reg = <0x6015000 0x1000>; reg-names = "cti-base"; coresight-id = <24>; coresight-id = <20>; coresight-name = "coresight-cti5"; coresight-nr-inports = <0>; Loading @@ -352,7 +407,7 @@ reg = <0x6016000 0x1000>; reg-names = "cti-base"; coresight-id = <25>; coresight-id = <21>; coresight-name = "coresight-cti6"; coresight-nr-inports = <0>; Loading @@ -366,7 +421,7 @@ reg = <0x6017000 0x1000>; reg-names = "cti-base"; coresight-id = <26>; coresight-id = <22>; coresight-name = "coresight-cti7"; coresight-nr-inports = <0>; Loading @@ -380,7 +435,7 @@ reg = <0x6018000 0x1000>; reg-names = "cti-base"; coresight-id = <27>; coresight-id = <23>; coresight-name = "coresight-cti8"; coresight-nr-inports = <0>; Loading @@ -394,7 +449,7 @@ reg = <0x6019000 0x1000>; reg-names = "cti-base"; coresight-id = <28>; coresight-id = <24>; coresight-name = "coresight-cti9"; coresight-nr-inports = <0>; Loading @@ -408,7 +463,7 @@ reg = <0x601a000 0x1000>; reg-names = "cti-base"; coresight-id = <29>; coresight-id = <25>; coresight-name = "coresight-cti10"; coresight-nr-inports = <0>; Loading @@ -422,7 +477,7 @@ reg = <0x601b000 0x1000>; reg-names = "cti-base"; coresight-id = <30>; coresight-id = <26>; coresight-name = "coresight-cti11"; coresight-nr-inports = <0>; Loading @@ -436,7 +491,7 @@ reg = <0x601c000 0x1000>; reg-names = "cti-base"; coresight-id = <31>; coresight-id = <27>; coresight-name = "coresight-cti12"; coresight-nr-inports = <0>; Loading @@ -450,7 +505,7 @@ reg = <0x601d000 0x1000>; reg-names = "cti-base"; coresight-id = <32>; coresight-id = <28>; coresight-name = "coresight-cti13"; coresight-nr-inports = <0>; Loading @@ -464,7 +519,7 @@ reg = <0x601e000 0x1000>; reg-names = "cti-base"; coresight-id = <33>; coresight-id = <29>; coresight-name = "coresight-cti14"; coresight-nr-inports = <0>; Loading @@ -478,7 +533,7 @@ reg = <0x601f000 0x1000>; reg-names = "cti-base"; coresight-id = <34>; coresight-id = <30>; coresight-name = "coresight-cti15"; coresight-nr-inports = <0>; Loading @@ -492,7 +547,7 @@ reg = <0x61b8000 0x1000>; reg-names = "cti-base"; coresight-id = <35>; coresight-id = <31>; coresight-name = "coresight-cti-cpu0"; coresight-nr-inports = <0>; coresight-cti-cpu = <&CPU0>; Loading @@ -507,7 +562,7 @@ reg = <0x61b9000 0x1000>; reg-names = "cti-base"; coresight-id = <36>; coresight-id = <32>; coresight-name = "coresight-cti-cpu1"; coresight-nr-inports = <0>; coresight-cti-cpu = <&CPU1>; Loading @@ -522,7 +577,7 @@ reg = <0x61ba000 0x1000>; reg-names = "cti-base"; coresight-id = <37>; coresight-id = <33>; coresight-name = "coresight-cti-cpu2"; coresight-nr-inports = <0>; coresight-cti-cpu = <&CPU2>; Loading @@ -537,7 +592,7 @@ reg = <0x61bb000 0x1000>; reg-names = "cti-base"; coresight-id = <38>; coresight-id = <34>; coresight-name = "coresight-cti-cpu3"; coresight-nr-inports = <0>; coresight-cti-cpu = <&CPU3>; Loading @@ -552,7 +607,7 @@ reg = <0x6124000 0x1000>; reg-names = "cti-base"; coresight-id = <43>; coresight-id = <35>; coresight-name = "coresight-cti-modem-cpu0"; coresight-nr-inports = <0>; Loading @@ -567,7 +622,7 @@ reg = <0x6139000 0x1000>; reg-names = "cti-base"; coresight-id = <44>; coresight-id = <36>; coresight-name = "coresight-cti-wcn-cpu0"; coresight-nr-inports = <0>; Loading @@ -582,7 +637,7 @@ reg = <0x6134000 0x1000>; reg-names = "cti-base"; coresight-id = <45>; coresight-id = <37>; coresight-name = "coresight-cti-video-cpu0"; coresight-nr-inports = <0>; Loading @@ -597,7 +652,7 @@ reg = <0x613c000 0x1000>; reg-names = "cti-base"; coresight-id = <46>; coresight-id = <38>; coresight-name = "coresight-cti-audio-cpu0"; coresight-nr-inports = <0>; Loading @@ -612,7 +667,7 @@ reg = <0x610c000 0x1000>; reg-names = "cti-base"; coresight-id = <47>; coresight-id = <39>; coresight-name = "coresight-cti-rpm-cpu0"; coresight-nr-inports = <0>; Loading @@ -625,7 +680,7 @@ wcn_etm0 { compatible = "qcom,coresight-remote-etm"; coresight-id = <48>; coresight-id = <40>; coresight-name = "coresight-wcn-etm0"; coresight-nr-inports = <0>; coresight-outports = <0>; Loading @@ -638,7 +693,7 @@ rpm_etm0 { compatible = "qcom,coresight-remote-etm"; coresight-id = <49>; coresight-id = <41>; coresight-name = "coresight-rpm-etm0"; coresight-nr-inports = <0>; coresight-outports = <0>; Loading @@ -652,7 +707,7 @@ audio_etm0 { compatible = "qcom,coresight-remote-etm"; coresight-id = <50>; coresight-id = <42>; coresight-name = "coresight-audio-etm0"; coresight-nr-inports = <0>; coresight-outports = <0>; Loading @@ -665,7 +720,7 @@ modem_etm0 { compatible = "qcom,coresight-remote-etm"; coresight-id = <51>; coresight-id = <43>; coresight-name = "coresight-modem-etm0"; coresight-nr-inports = <0>; coresight-outports = <0>; Loading @@ -680,7 +735,7 @@ reg = <0x6001000 0x1000>; reg-names = "csr-base"; coresight-id = <52>; coresight-id = <44>; coresight-name = "coresight-csr"; coresight-nr-inports = <0>; qcom,blk-size = <1>; Loading @@ -695,7 +750,7 @@ reg = <0x6108000 0x1000>; reg-names = "dbgui-base"; coresight-id = <53>; coresight-id = <45>; coresight-name = "coresight-dbgui"; coresight-nr-inports = <0>; coresight-outports = <0>; Loading @@ -716,7 +771,7 @@ reg = <0x6003000 0x1000>; reg-names = "tpda-base"; coresight-id = <54>; coresight-id = <46>; coresight-name = "coresight-tpda"; coresight-nr-inports = <2>; coresight-outports = <0>; Loading @@ -736,7 +791,7 @@ reg = <0x6110000 0x1000>; reg-names = "tpdm-base"; coresight-id = <55>; coresight-id = <47>; coresight-name = "coresight-tpdm-dcc"; coresight-nr-inports = <1>; coresight-outports = <0>; Loading @@ -763,7 +818,7 @@ "mm-wrapper-mux", "mm-wrapper-lockaccess", "usbbam-mux", "blsp-mux"; coresight-id = <56>; coresight-id = <48>; coresight-name = "coresight-hwevent"; coresight-nr-inports = <0>; Loading @@ -779,8 +834,26 @@ <0xa600c 0x4>; reg-names = "fuse-base", "nidnt-fuse-base", "qpdi-fuse-base"; coresight-id = <57>; coresight-id = <49>; coresight-name = "coresight-fuse"; coresight-nr-inports = <0>; }; qpdi: qpdi@1941000 { compatible = "qcom,coresight-qpdi"; reg = <0x1941000 0x4>; reg-names = "qpdi-base"; coresight-id = <50>; coresight-name = "coresight-qpdi"; coresight-nr-inports = <0>; vdd-supply = <&pmgold_l11>; qcom,vdd-voltage-level = <2950000 2950000>; qcom,vdd-current-level = <15000 400000>; vdd-io-supply = <&pmgold_l12>; qcom,vdd-io-voltage-level = <2950000 2950000>; qcom,vdd-io-current-level = <200 50000>; }; };
arch/arm/boot/dts/qcom/msmgold-pinctrl.dtsi +242 −0 Original line number Diff line number Diff line Loading @@ -104,5 +104,247 @@ }; }; }; pmx_qdsd_clk { qdsd_clk_sdcard: clk_sdcard { config { pins = "qdsd_clk"; bias-disable; /* NO pull */ drive-strength = <16>; /* 16 MA */ }; }; qdsd_clk_trace: clk_trace { config { pins = "qdsd_clk"; bias-pull-down; /* pull down */ drive-strength = <2>; /* 2 MA */ }; }; qdsd_clk_swdtrc: clk_swdtrc { config { pins = "qdsd_clk"; bias-pull-down; /* pull down */ drive-strength = <2>; /* 2 MA */ }; }; qdsd_clk_spmi: clk_spmi { config { pins = "qdsd_clk"; bias-pull-down; /* pull down */ drive-strength = <2>; /* 2 MA */ }; }; }; pmx_qdsd_cmd { qdsd_cmd_sdcard: cmd_sdcard { config { pins = "qdsd_cmd"; bias-pull-down; /* pull down */ drive-strength = <8>; /* 8 MA */ }; }; qdsd_cmd_trace: cmd_trace { config { pins = "qdsd_cmd"; bias-pull-down; /* pull down */ drive-strength = <2>; /* 2 MA */ }; }; qdsd_cmd_swduart: cmd_uart { config { pins = "qdsd_cmd"; bias-pull-up; /* pull up */ drive-strength = <2>; /* 2 MA */ }; }; qdsd_cmd_swdtrc: cmd_swdtrc { config { pins = "qdsd_cmd"; bias-pull-up; /* pull up */ drive-strength = <2>; /* 2 MA */ }; }; qdsd_cmd_jtag: cmd_jtag { config { pins = "qdsd_cmd"; bias-disable; /* NO pull */ drive-strength = <8>; /* 8 MA */ }; }; qdsd_cmd_spmi: cmd_spmi { config { pins = "qdsd_cmd"; bias-pull-down; /* pull down */ drive-strength = <10>; /* 10 MA */ }; }; }; pmx_qdsd_data0 { qdsd_data0_sdcard: data0_sdcard { config { pins = "qdsd_data0"; bias-pull-down; /* pull down */ drive-strength = <8>; /* 8 MA */ }; }; qdsd_data0_trace: data0_trace { config { pins = "qdsd_data0"; bias-pull-down; /* pull down */ drive-strength = <8>; /* 8 MA */ }; }; qdsd_data0_swduart: data0_uart { config { pins = "qdsd_data0"; bias-pull-down; /* pull down */ drive-strength = <2>; /* 2 MA */ }; }; qdsd_data0_swdtrc: data0_swdtrc { config { pins = "qdsd_data0"; bias-pull-down; /* pull down */ drive-strength = <2>; /* 2 MA */ }; }; qdsd_data0_jtag: data0_jtag { config { pins = "qdsd_data0"; bias-pull-up; /* pull up */ drive-strength = <2>; /* 2 MA */ }; }; qdsd_data0_spmi: data0_spmi { config { pins = "qdsd_data0"; bias-pull-down; /* pull down */ drive-strength = <2>; /* 2 MA */ }; }; }; pmx_qdsd_data1 { qdsd_data1_sdcard: data1_sdcard { config { pins = "qdsd_data1"; bias-pull-down; /* pull down */ drive-strength = <8>; /* 8 MA */ }; }; qdsd_data1_trace: data1_trace { config { pins = "qdsd_data1"; bias-pull-down; /* pull down */ drive-strength = <8>; /* 8 MA */ }; }; qdsd_data1_swduart: data1_uart { config { pins = "qdsd_data1"; bias-pull-down; /* pull down */ drive-strength = <2>; /* 2 MA */ }; }; qdsd_data1_swdtrc: data1_swdtrc { config { pins = "qdsd_data1"; bias-pull-down; /* pull down */ drive-strength = <2>; /* 2 MA */ }; }; qdsd_data1_jtag: data1_jtag { config { pins = "qdsd_data1"; bias-pull-down; /* pull down */ drive-strength = <2>; /* 2 MA */ }; }; }; pmx_qdsd_data2 { qdsd_data2_sdcard: data2_sdcard { config { pins = "qdsd_data2"; bias-pull-down; /* pull down */ drive-strength = <8>; /* 8 MA */ }; }; qdsd_data2_trace: data2_trace { config { pins = "qdsd_data2"; bias-pull-down; /* pull down */ drive-strength = <8>; /* 8 MA */ }; }; qdsd_data2_swduart: data2_uart { config { pins = "qdsd_data2"; bias-pull-down; /* pull down */ drive-strength = <2>; /* 2 MA */ }; }; qdsd_data2_swdtrc: data2_swdtrc { config { pins = "qdsd_data2"; bias-pull-down; /* pull down */ drive-strength = <2>; /* 2 MA */ }; }; qdsd_data2_jtag: data2_jtag { config { pins = "qdsd_data2"; bias-pull-up; /* pull up */ drive-strength = <8>; /* 8 MA */ }; }; }; pmx_qdsd_data3 { qdsd_data3_sdcard: data3_sdcard { config { pins = "qdsd_data3"; bias-pull-down; /* pull down */ drive-strength = <8>; /* 8 MA */ }; }; qdsd_data3_trace: data3_trace { config { pins = "qdsd_data3"; bias-pull-down; /* pull down */ drive-strength = <8>; /* 8 MA */ }; }; qdsd_data3_swduart: data3_uart { config { pins = "qdsd_data3"; bias-pull-up; /* pull up */ drive-strength = <2>; /* 2 MA */ }; }; qdsd_data3_swdtrc: data3_swdtrc { config { pins = "qdsd_data3"; bias-pull-up; /* pull up */ drive-strength = <2>; /* 2 MA */ }; }; qdsd_data3_jtag: data3_jtag { config { pins = "qdsd_data3"; bias-pull-up; /* pull up */ drive-strength = <2>; /* 2 MA */ }; }; qdsd_data3_spmi: data3_spmi { config { pins = "qdsd_data3"; bias-pull-down; /* pull down */ drive-strength = <8>; /* 8 MA */ }; }; }; }; };