ARM: dts: msm: add support for speed bin 1 parts for msm8996v3

Add support for MSM8996v3 parts which have their speed bin fuse
configured as 1 instead of 0.  These parts operate with lower
maximum frequencies.

Max frequency in MHz for each VDD_APCC clock domain:

      Domain           Speed Bin 0     Speed Bin 1
--------------------------------------------------
   Power Cluster         1593.6          1363.2
Performance Cluster      2150.4          1804.8
     CBF Clock           1593.6          1305.6

Remap the Turbo fuse corner of each VDD_APCC regulator subnode
to these new frequencies and keep the mapping for lower fuse
corners to frequencies the same.

Change-Id: Ie0c29458a8a21914d201a19c18b883ee6bb09dbd
Signed-off-by: David Collins <collinsd@codeaurora.org>