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Commit 937ad104 authored by Kevin Cernekee's avatar Kevin Cernekee Committed by Ralf Baechle
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MIPS: BCM63XX: Handle SW IRQs 0-1 



MIPS software IRQs 0 and 1 are used for interprocessor signaling (IPI)
on BMIPS SMP.  Make the board support code aware of them.

Signed-off-by: default avatarKevin Cernekee <cernekee@gmail.com>
[jogo@openwrt.org: move sw irqs behind timer irq]
Signed-off-by: default avatarJonas Gorski <jogo@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: John Crispin <blogic@openwrt.org>
Cc: Maxime Bizon <mbizon@freebox.fr>
Cc: Florian Fainelli <florian@openwrt.org>
Patchwork: https://patchwork.linux-mips.org/patch/5354/


Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent 1400eb65

arch/mips/bcm63xx/irq.c

+4 −0
Original line number Diff line number Diff line
@@ -294,6 +294,10 @@ asmlinkage void plat_irq_dispatch(void) 


		if (cause & CAUSEF_IP7)

			do_IRQ(7);

		if (cause & CAUSEF_IP0)

			do_IRQ(0);

		if (cause & CAUSEF_IP1)

			do_IRQ(1);

		if (cause & CAUSEF_IP2)

			dispatch_internal();

		if (!is_ext_irq_cascaded) {