msm: mdss: phy_sw_reset both dsi controllers at same time

During split display case, the 2nd dsi ctrl's phy/pll registers are
programmed at same time as 1st ctrl programmed since both controller
share pll0. Therefore they have to be reset at same time also.

Change-Id: Ifb2007c4efd619cd5f08a0fc64fd66f22d62efcd
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>