arm64: strcmp: align to 64B cache line

Align strcmp to 64B. This will ensure the preformance critical
loop is within one 64B cache line.

Change-Id: I9240fbb4407637b2290a44e02ad59098a377b356
Signed-off-by: Yuanyuan Zhong <zyy@motorola.com>
Reviewed-on: https://gerrit.mot.com/902536


SME-Granted: SME Approvals Granted
SLTApproved: Slta Waiver <sltawvr@motorola.com>
Tested-by: Jira Key <jirakey@motorola.com>
Reviewed-by: Yi-Wei Zhao <gbjc64@motorola.com>
Reviewed-by: Igor Kovalenko <igork@motorola.com>
Submit-Approved: Jira Key <jirakey@motorola.com>
Signed-off-by: Francisco Franco <franciscofranco.1990@gmail.com>