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Commit 917d8535 authored by Barry Song's avatar Barry Song Committed by Barry Song
Browse files

ARM: CSR: call l2x0_of_init to init L2 cache of SiRFprimaII 



Cc: Rob Herring <robherring2@gmail.com>
Signed-off-by: default avatarBarry Song <Baohua.Song@csr.com>
parent 1e11bec9

arch/arm/boot/dts/prima2-cb.dts

+4 −1
Original line number Original line Diff line number Diff line
@@ -39,9 +39,12 @@ 
		ranges = <0x40000000 0x40000000 0x80000000>;

		ranges = <0x40000000 0x40000000 0x80000000>;





		l2-cache-controller@80040000 {

		l2-cache-controller@80040000 {

			compatible = "arm,pl310-cache";

			compatible = "arm,pl310-cache", "sirf,prima2-pl310-cache";

			reg = <0x80040000 0x1000>;

			reg = <0x80040000 0x1000>;

			interrupts = <59>;

			interrupts = <59>;

			arm,tag-latency = <1 1 1>;

			arm,data-latency = <1 1 1>;

			arm,filter-ranges = <0 0x40000000>;

		};

		};





		intc: interrupt-controller@80020000 {

		intc: interrupt-controller@80020000 {

arch/arm/mach-prima2/l2x0.c

+9 −37
Original line number Original line Diff line number Diff line
@@ -8,52 +8,24 @@ 




#include <linux/init.h>

#include <linux/init.h>

#include <linux/kernel.h>

#include <linux/kernel.h>

#include <linux/io.h>

#include <linux/errno.h>

#include <linux/of.h>

#include <linux/of.h>

#include <linux/of_address.h>

#include <asm/hardware/cache-l2x0.h>

#include <asm/hardware/cache-l2x0.h>

#include <mach/memory.h>





#define L2X0_ADDR_FILTERING_START       0xC00

static struct of_device_id prima2_l2x0_ids[]  = {

#define L2X0_ADDR_FILTERING_END         0xC04

	{ .compatible = "sirf,prima2-pl310-cache" },



	{},

static struct of_device_id l2x_ids[]  = {

	{ .compatible = "arm,pl310-cache" },

};

};





static int __init sirfsoc_of_l2x_init(void)

static int __init sirfsoc_l2x0_init(void)

{

{

	struct device_node *np;

	struct device_node *np;

	void __iomem *sirfsoc_l2x_base;



	np = of_find_matching_node(NULL, l2x_ids);

	if (!np)

		panic("unable to find compatible l2x node in dtb\n");



	sirfsoc_l2x_base = of_iomap(np, 0);

	if (!sirfsoc_l2x_base)

		panic("unable to map l2x cpu registers\n");



	of_node_put(np);



	if (!(readl_relaxed(sirfsoc_l2x_base + L2X0_CTRL) & 1)) {

		/*

		 * set the physical memory windows L2 cache will cover

		 */

		writel_relaxed(PLAT_PHYS_OFFSET + 1024 * 1024 * 1024,

			sirfsoc_l2x_base + L2X0_ADDR_FILTERING_END);

		writel_relaxed(PLAT_PHYS_OFFSET | 0x1,

			sirfsoc_l2x_base + L2X0_ADDR_FILTERING_START);





		writel_relaxed(0,

	np = of_find_matching_node(NULL, prima2_l2x0_ids);

			sirfsoc_l2x_base + L2X0_TAG_LATENCY_CTRL);

	if (np) {

		writel_relaxed(0,

		pr_info("Initializing prima2 L2 cache\n");

			sirfsoc_l2x_base + L2X0_DATA_LATENCY_CTRL);

		return l2x0_of_init(0x40000, 0);

	}

	}

	l2x0_init((void __iomem *)sirfsoc_l2x_base, 0x00040000,

		0x00000000);





	return 0;

	return 0;

}

}

early_initcall(sirfsoc_of_l2x_init);
 
early_initcall(sirfsoc_l2x0_init);