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Commit 828ed3e1 authored by Chris Wilson's avatar Chris Wilson Committed by Daniel Vetter
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drm/i915/sprite: Avoid incurring extra vblank stall when updating plane on IVB 



IvyBridge requires an extra frame between disabling the low power
watermarks and enabling scaling on the sprite plane. If the scaling
is already enabled, then we have already disabled the low power
watermarks and need not incur an extra wait.

Similarly, as we disable the scaling when turning off the sprite plane,
we can update the scaling enabled flag and restore the low power
watermarks.

Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: default avatarJesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 083f9560

drivers/gpu/drm/i915/intel_sprite.c

+13 −6
Original line number Diff line number Diff line
@@ -110,15 +110,19 @@ ivb_update_plane(struct drm_plane *plane, struct drm_framebuffer *fb, 
	 * when scaling is disabled.

	 */

	if (crtc_w != src_w || crtc_h != src_h) {

		if (!dev_priv->sprite_scaling_enabled) {

			dev_priv->sprite_scaling_enabled = true;

			intel_update_watermarks(dev);

			intel_wait_for_vblank(dev, pipe);

		}

		sprscale = SPRITE_SCALE_ENABLE | (src_w << 16) | src_h;

	} else {

		if (dev_priv->sprite_scaling_enabled) {

			dev_priv->sprite_scaling_enabled = false;

			/* potentially re-enable LP watermarks */

			intel_update_watermarks(dev);

		}

	}



	I915_WRITE(SPRSTRIDE(pipe), fb->pitches[0]);

	I915_WRITE(SPRPOS(pipe), (crtc_y << 16) | crtc_x);
@@ -151,6 +155,9 @@ ivb_disable_plane(struct drm_plane *plane) 
	/* Activate double buffered register update */

	I915_MODIFY_DISPBASE(SPRSURF(pipe), 0);

	POSTING_READ(SPRSURF(pipe));



	dev_priv->sprite_scaling_enabled = false;

	intel_update_watermarks(dev);

}



static int