Loading arch/powerpc/boot/dts/canyonlands.dts +2 −2 Original line number Diff line number Diff line Loading @@ -270,7 +270,7 @@ clock-frequency = <0>; /* Filled in by U-Boot */ current-speed = <0>; /* Filled in by U-Boot */ interrupt-parent = <&UIC1>; interrupts = <0x1d 0x4>; interrupts = <28 0x4>; }; UART3: serial@ef600600 { Loading @@ -281,7 +281,7 @@ clock-frequency = <0>; /* Filled in by U-Boot */ current-speed = <0>; /* Filled in by U-Boot */ interrupt-parent = <&UIC1>; interrupts = <0x1e 0x4>; interrupts = <29 0x4>; }; IIC0: i2c@ef600700 { Loading arch/powerpc/boot/dts/glacier.dts +2 −2 Original line number Diff line number Diff line Loading @@ -259,7 +259,7 @@ clock-frequency = <0>; /* Filled in by U-Boot */ current-speed = <0>; /* Filled in by U-Boot */ interrupt-parent = <&UIC1>; interrupts = <0x1d 0x4>; interrupts = <28 0x4>; }; UART3: serial@ef600600 { Loading @@ -270,7 +270,7 @@ clock-frequency = <0>; /* Filled in by U-Boot */ current-speed = <0>; /* Filled in by U-Boot */ interrupt-parent = <&UIC1>; interrupts = <0x1e 0x4>; interrupts = <29 0x4>; }; IIC0: i2c@ef600700 { Loading arch/powerpc/kernel/cputable.c +111 −7 Original line number Diff line number Diff line Loading @@ -1364,10 +1364,10 @@ static struct cpu_spec __initdata cpu_specs[] = { .machine_check = machine_check_4xx, .platform = "ppc405", }, { /* 405EX */ .pvr_mask = 0xffff0004, .pvr_value = 0x12910004, .cpu_name = "405EX", { /* 405EX Rev. A/B with Security */ .pvr_mask = 0xffff000f, .pvr_value = 0x12910007, .cpu_name = "405EX Rev. A/B", .cpu_features = CPU_FTRS_40X, .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, Loading @@ -1377,10 +1377,114 @@ static struct cpu_spec __initdata cpu_specs[] = { .machine_check = machine_check_4xx, .platform = "ppc405", }, { /* 405EXr */ .pvr_mask = 0xffff0004, { /* 405EX Rev. C without Security */ .pvr_mask = 0xffff000f, .pvr_value = 0x1291000d, .cpu_name = "405EX Rev. C", .cpu_features = CPU_FTRS_40X, .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, .mmu_features = MMU_FTR_TYPE_40x, .icache_bsize = 32, .dcache_bsize = 32, .machine_check = machine_check_4xx, .platform = "ppc405", }, { /* 405EX Rev. C with Security */ .pvr_mask = 0xffff000f, .pvr_value = 0x1291000f, .cpu_name = "405EX Rev. C", .cpu_features = CPU_FTRS_40X, .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, .mmu_features = MMU_FTR_TYPE_40x, .icache_bsize = 32, .dcache_bsize = 32, .machine_check = machine_check_4xx, .platform = "ppc405", }, { /* 405EX Rev. D without Security */ .pvr_mask = 0xffff000f, .pvr_value = 0x12910003, .cpu_name = "405EX Rev. D", .cpu_features = CPU_FTRS_40X, .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, .mmu_features = MMU_FTR_TYPE_40x, .icache_bsize = 32, .dcache_bsize = 32, .machine_check = machine_check_4xx, .platform = "ppc405", }, { /* 405EX Rev. D with Security */ .pvr_mask = 0xffff000f, .pvr_value = 0x12910005, .cpu_name = "405EX Rev. D", .cpu_features = CPU_FTRS_40X, .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, .mmu_features = MMU_FTR_TYPE_40x, .icache_bsize = 32, .dcache_bsize = 32, .machine_check = machine_check_4xx, .platform = "ppc405", }, { /* 405EXr Rev. A/B without Security */ .pvr_mask = 0xffff000f, .pvr_value = 0x12910001, .cpu_name = "405EXr Rev. A/B", .cpu_features = CPU_FTRS_40X, .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, .mmu_features = MMU_FTR_TYPE_40x, .icache_bsize = 32, .dcache_bsize = 32, .machine_check = machine_check_4xx, .platform = "ppc405", }, { /* 405EXr Rev. C without Security */ .pvr_mask = 0xffff000f, .pvr_value = 0x12910009, .cpu_name = "405EXr Rev. C", .cpu_features = CPU_FTRS_40X, .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, .mmu_features = MMU_FTR_TYPE_40x, .icache_bsize = 32, .dcache_bsize = 32, .machine_check = machine_check_4xx, .platform = "ppc405", }, { /* 405EXr Rev. C with Security */ .pvr_mask = 0xffff000f, .pvr_value = 0x1291000b, .cpu_name = "405EXr Rev. C", .cpu_features = CPU_FTRS_40X, .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, .mmu_features = MMU_FTR_TYPE_40x, .icache_bsize = 32, .dcache_bsize = 32, .machine_check = machine_check_4xx, .platform = "ppc405", }, { /* 405EXr Rev. D without Security */ .pvr_mask = 0xffff000f, .pvr_value = 0x12910000, .cpu_name = "405EXr", .cpu_name = "405EXr Rev. D", .cpu_features = CPU_FTRS_40X, .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, .mmu_features = MMU_FTR_TYPE_40x, .icache_bsize = 32, .dcache_bsize = 32, .machine_check = machine_check_4xx, .platform = "ppc405", }, { /* 405EXr Rev. D with Security */ .pvr_mask = 0xffff000f, .pvr_value = 0x12910002, .cpu_name = "405EXr Rev. D", .cpu_features = CPU_FTRS_40X, .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, Loading arch/powerpc/platforms/40x/Kconfig +0 −16 Original line number Diff line number Diff line Loading @@ -71,22 +71,6 @@ config MAKALU help This option enables support for the AMCC PPC405EX board. #config REDWOOD_5 # bool "Redwood-5" # depends on 40x # default n # select STB03xxx # help # This option enables support for the IBM STB04 evaluation board. #config REDWOOD_6 # bool "Redwood-6" # depends on 40x # default n # select STB03xxx # help # This option enables support for the IBM STBx25xx evaluation board. #config SYCAMORE # bool "Sycamore" # depends on 40x Loading drivers/mtd/maps/Kconfig +1 −1 Original line number Diff line number Diff line Loading @@ -321,7 +321,7 @@ config MTD_CFI_FLAGADM config MTD_REDWOOD tristate "CFI Flash devices mapped on IBM Redwood" depends on MTD_CFI && ( REDWOOD_4 || REDWOOD_5 || REDWOOD_6 ) depends on MTD_CFI help This enables access routines for the flash chips on the IBM Redwood board. If you have one of these boards and would like to Loading Loading
arch/powerpc/boot/dts/canyonlands.dts +2 −2 Original line number Diff line number Diff line Loading @@ -270,7 +270,7 @@ clock-frequency = <0>; /* Filled in by U-Boot */ current-speed = <0>; /* Filled in by U-Boot */ interrupt-parent = <&UIC1>; interrupts = <0x1d 0x4>; interrupts = <28 0x4>; }; UART3: serial@ef600600 { Loading @@ -281,7 +281,7 @@ clock-frequency = <0>; /* Filled in by U-Boot */ current-speed = <0>; /* Filled in by U-Boot */ interrupt-parent = <&UIC1>; interrupts = <0x1e 0x4>; interrupts = <29 0x4>; }; IIC0: i2c@ef600700 { Loading
arch/powerpc/boot/dts/glacier.dts +2 −2 Original line number Diff line number Diff line Loading @@ -259,7 +259,7 @@ clock-frequency = <0>; /* Filled in by U-Boot */ current-speed = <0>; /* Filled in by U-Boot */ interrupt-parent = <&UIC1>; interrupts = <0x1d 0x4>; interrupts = <28 0x4>; }; UART3: serial@ef600600 { Loading @@ -270,7 +270,7 @@ clock-frequency = <0>; /* Filled in by U-Boot */ current-speed = <0>; /* Filled in by U-Boot */ interrupt-parent = <&UIC1>; interrupts = <0x1e 0x4>; interrupts = <29 0x4>; }; IIC0: i2c@ef600700 { Loading
arch/powerpc/kernel/cputable.c +111 −7 Original line number Diff line number Diff line Loading @@ -1364,10 +1364,10 @@ static struct cpu_spec __initdata cpu_specs[] = { .machine_check = machine_check_4xx, .platform = "ppc405", }, { /* 405EX */ .pvr_mask = 0xffff0004, .pvr_value = 0x12910004, .cpu_name = "405EX", { /* 405EX Rev. A/B with Security */ .pvr_mask = 0xffff000f, .pvr_value = 0x12910007, .cpu_name = "405EX Rev. A/B", .cpu_features = CPU_FTRS_40X, .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, Loading @@ -1377,10 +1377,114 @@ static struct cpu_spec __initdata cpu_specs[] = { .machine_check = machine_check_4xx, .platform = "ppc405", }, { /* 405EXr */ .pvr_mask = 0xffff0004, { /* 405EX Rev. C without Security */ .pvr_mask = 0xffff000f, .pvr_value = 0x1291000d, .cpu_name = "405EX Rev. C", .cpu_features = CPU_FTRS_40X, .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, .mmu_features = MMU_FTR_TYPE_40x, .icache_bsize = 32, .dcache_bsize = 32, .machine_check = machine_check_4xx, .platform = "ppc405", }, { /* 405EX Rev. C with Security */ .pvr_mask = 0xffff000f, .pvr_value = 0x1291000f, .cpu_name = "405EX Rev. C", .cpu_features = CPU_FTRS_40X, .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, .mmu_features = MMU_FTR_TYPE_40x, .icache_bsize = 32, .dcache_bsize = 32, .machine_check = machine_check_4xx, .platform = "ppc405", }, { /* 405EX Rev. D without Security */ .pvr_mask = 0xffff000f, .pvr_value = 0x12910003, .cpu_name = "405EX Rev. D", .cpu_features = CPU_FTRS_40X, .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, .mmu_features = MMU_FTR_TYPE_40x, .icache_bsize = 32, .dcache_bsize = 32, .machine_check = machine_check_4xx, .platform = "ppc405", }, { /* 405EX Rev. D with Security */ .pvr_mask = 0xffff000f, .pvr_value = 0x12910005, .cpu_name = "405EX Rev. D", .cpu_features = CPU_FTRS_40X, .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, .mmu_features = MMU_FTR_TYPE_40x, .icache_bsize = 32, .dcache_bsize = 32, .machine_check = machine_check_4xx, .platform = "ppc405", }, { /* 405EXr Rev. A/B without Security */ .pvr_mask = 0xffff000f, .pvr_value = 0x12910001, .cpu_name = "405EXr Rev. A/B", .cpu_features = CPU_FTRS_40X, .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, .mmu_features = MMU_FTR_TYPE_40x, .icache_bsize = 32, .dcache_bsize = 32, .machine_check = machine_check_4xx, .platform = "ppc405", }, { /* 405EXr Rev. C without Security */ .pvr_mask = 0xffff000f, .pvr_value = 0x12910009, .cpu_name = "405EXr Rev. C", .cpu_features = CPU_FTRS_40X, .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, .mmu_features = MMU_FTR_TYPE_40x, .icache_bsize = 32, .dcache_bsize = 32, .machine_check = machine_check_4xx, .platform = "ppc405", }, { /* 405EXr Rev. C with Security */ .pvr_mask = 0xffff000f, .pvr_value = 0x1291000b, .cpu_name = "405EXr Rev. C", .cpu_features = CPU_FTRS_40X, .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, .mmu_features = MMU_FTR_TYPE_40x, .icache_bsize = 32, .dcache_bsize = 32, .machine_check = machine_check_4xx, .platform = "ppc405", }, { /* 405EXr Rev. D without Security */ .pvr_mask = 0xffff000f, .pvr_value = 0x12910000, .cpu_name = "405EXr", .cpu_name = "405EXr Rev. D", .cpu_features = CPU_FTRS_40X, .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, .mmu_features = MMU_FTR_TYPE_40x, .icache_bsize = 32, .dcache_bsize = 32, .machine_check = machine_check_4xx, .platform = "ppc405", }, { /* 405EXr Rev. D with Security */ .pvr_mask = 0xffff000f, .pvr_value = 0x12910002, .cpu_name = "405EXr Rev. D", .cpu_features = CPU_FTRS_40X, .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, Loading
arch/powerpc/platforms/40x/Kconfig +0 −16 Original line number Diff line number Diff line Loading @@ -71,22 +71,6 @@ config MAKALU help This option enables support for the AMCC PPC405EX board. #config REDWOOD_5 # bool "Redwood-5" # depends on 40x # default n # select STB03xxx # help # This option enables support for the IBM STB04 evaluation board. #config REDWOOD_6 # bool "Redwood-6" # depends on 40x # default n # select STB03xxx # help # This option enables support for the IBM STBx25xx evaluation board. #config SYCAMORE # bool "Sycamore" # depends on 40x Loading
drivers/mtd/maps/Kconfig +1 −1 Original line number Diff line number Diff line Loading @@ -321,7 +321,7 @@ config MTD_CFI_FLAGADM config MTD_REDWOOD tristate "CFI Flash devices mapped on IBM Redwood" depends on MTD_CFI && ( REDWOOD_4 || REDWOOD_5 || REDWOOD_6 ) depends on MTD_CFI help This enables access routines for the flash chips on the IBM Redwood board. If you have one of these boards and would like to Loading