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Commit ff349103 authored by Lee Nipper's avatar Lee Nipper Committed by Josh Boyer
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powerpc/40x: Distinguish AMCC PowerPC 405EX and 405EXr correctly 



The recent AMCC 405EX Rev D without Security uses a PVR value
that matches the old 405EXr Rev A/B with Security.
The 405EX Rev D without Security would be shown
incorrectly as an 405EXr. The pvr_mask of 0xffff0004
is no longer sufficient to distinguish the 405EX from 405EXr.

This patch replaces 2 entries in the cpu_specs table
and adds 8 more, each using pvr_mask of 0xffff000f
and appropriate pvr_value to distinguish the AMCC
PowerPC 405EX and 405EXr instances.
The cpu_name for these entries now includes the
Rev, in similar fashion to the 440GX.

Signed-off-by: default avatarLee Nipper <lee.nipper@gmail.com>
Signed-off-by: default avatarJosh Boyer <jwboyer@linux.vnet.ibm.com>
parent 9a52e392

arch/powerpc/kernel/cputable.c

+111 −7
Original line number Diff line number Diff line
@@ -1364,10 +1364,10 @@ static struct cpu_spec __initdata cpu_specs[] = { 
		.machine_check		= machine_check_4xx,

		.platform		= "ppc405",

	},

	{	/* 405EX */

		.pvr_mask		= 0xffff0004,

		.pvr_value		= 0x12910004,

		.cpu_name		= "405EX",

	{	/* 405EX Rev. A/B with Security */

		.pvr_mask		= 0xffff000f,

		.pvr_value		= 0x12910007,

		.cpu_name		= "405EX Rev. A/B",

		.cpu_features		= CPU_FTRS_40X,

		.cpu_user_features	= PPC_FEATURE_32 |

			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
@@ -1377,10 +1377,114 @@ static struct cpu_spec __initdata cpu_specs[] = { 
		.machine_check		= machine_check_4xx,

		.platform		= "ppc405",

	},

	{	/* 405EXr */

		.pvr_mask		= 0xffff0004,

	{	/* 405EX Rev. C without Security */

		.pvr_mask		= 0xffff000f,

		.pvr_value		= 0x1291000d,

		.cpu_name		= "405EX Rev. C",

		.cpu_features		= CPU_FTRS_40X,

		.cpu_user_features	= PPC_FEATURE_32 |

			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,

		.mmu_features		= MMU_FTR_TYPE_40x,

		.icache_bsize		= 32,

		.dcache_bsize		= 32,

		.machine_check		= machine_check_4xx,

		.platform		= "ppc405",

	},

	{	/* 405EX Rev. C with Security */

		.pvr_mask		= 0xffff000f,

		.pvr_value		= 0x1291000f,

		.cpu_name		= "405EX Rev. C",

		.cpu_features		= CPU_FTRS_40X,

		.cpu_user_features	= PPC_FEATURE_32 |

			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,

		.mmu_features		= MMU_FTR_TYPE_40x,

		.icache_bsize		= 32,

		.dcache_bsize		= 32,

		.machine_check		= machine_check_4xx,

		.platform		= "ppc405",

	},

	{	/* 405EX Rev. D without Security */

		.pvr_mask		= 0xffff000f,

		.pvr_value		= 0x12910003,

		.cpu_name		= "405EX Rev. D",

		.cpu_features		= CPU_FTRS_40X,

		.cpu_user_features	= PPC_FEATURE_32 |

			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,

		.mmu_features		= MMU_FTR_TYPE_40x,

		.icache_bsize		= 32,

		.dcache_bsize		= 32,

		.machine_check		= machine_check_4xx,

		.platform		= "ppc405",

	},

	{	/* 405EX Rev. D with Security */

		.pvr_mask		= 0xffff000f,

		.pvr_value		= 0x12910005,

		.cpu_name		= "405EX Rev. D",

		.cpu_features		= CPU_FTRS_40X,

		.cpu_user_features	= PPC_FEATURE_32 |

			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,

		.mmu_features		= MMU_FTR_TYPE_40x,

		.icache_bsize		= 32,

		.dcache_bsize		= 32,

		.machine_check		= machine_check_4xx,

		.platform		= "ppc405",

	},

	{	/* 405EXr Rev. A/B without Security */

		.pvr_mask		= 0xffff000f,

		.pvr_value		= 0x12910001,

		.cpu_name		= "405EXr Rev. A/B",

		.cpu_features		= CPU_FTRS_40X,

		.cpu_user_features	= PPC_FEATURE_32 |

			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,

		.mmu_features		= MMU_FTR_TYPE_40x,

		.icache_bsize		= 32,

		.dcache_bsize		= 32,

		.machine_check		= machine_check_4xx,

		.platform		= "ppc405",

	},

	{	/* 405EXr Rev. C without Security */

		.pvr_mask		= 0xffff000f,

		.pvr_value		= 0x12910009,

		.cpu_name		= "405EXr Rev. C",

		.cpu_features		= CPU_FTRS_40X,

		.cpu_user_features	= PPC_FEATURE_32 |

			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,

		.mmu_features		= MMU_FTR_TYPE_40x,

		.icache_bsize		= 32,

		.dcache_bsize		= 32,

		.machine_check		= machine_check_4xx,

		.platform		= "ppc405",

	},

	{	/* 405EXr Rev. C with Security */

		.pvr_mask		= 0xffff000f,

		.pvr_value		= 0x1291000b,

		.cpu_name		= "405EXr Rev. C",

		.cpu_features		= CPU_FTRS_40X,

		.cpu_user_features	= PPC_FEATURE_32 |

			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,

		.mmu_features		= MMU_FTR_TYPE_40x,

		.icache_bsize		= 32,

		.dcache_bsize		= 32,

		.machine_check		= machine_check_4xx,

		.platform		= "ppc405",

	},

	{	/* 405EXr Rev. D without Security */

		.pvr_mask		= 0xffff000f,

		.pvr_value		= 0x12910000,

		.cpu_name		= "405EXr",

		.cpu_name		= "405EXr Rev. D",

		.cpu_features		= CPU_FTRS_40X,

		.cpu_user_features	= PPC_FEATURE_32 |

			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,

		.mmu_features		= MMU_FTR_TYPE_40x,

		.icache_bsize		= 32,

		.dcache_bsize		= 32,

		.machine_check		= machine_check_4xx,

		.platform		= "ppc405",

	},

	{	/* 405EXr Rev. D with Security */

		.pvr_mask		= 0xffff000f,

		.pvr_value		= 0x12910002,

		.cpu_name		= "405EXr Rev. D",

		.cpu_features		= CPU_FTRS_40X,

		.cpu_user_features	= PPC_FEATURE_32 |

			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,