Merge "coresight: etm3x: adding cpu affinity to sysFS interface" (7d1395c7) · Commits · e / devices / android_kernel_xiaomi_markw

Documentation/ABI/testing/sysfs-bus-coresight-devices-etm4x

+1 −1

Original line number	Diff line number	Diff line
		@@ -249,7 +249,7 @@ KernelVersion: 4.01
		Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
		Description: (RW) Select which context ID comparator to work with.

		What: /sys/bus/coresight/devices/<memory_map>.etm/ctxid_val
		What: /sys/bus/coresight/devices/<memory_map>.etm/ctxid_pid
		Date: April 2015
		KernelVersion: 4.01
		Contact: Mathieu Poirier <mathieu.poirier@linaro.org>

drivers/hwtracing/coresight/coresight-etm.h

+5 −2

Original line number	Diff line number	Diff line
		@@ -183,7 +183,9 @@
		* @seq_13_event: event causing the transition from 1 to 3.
		* @seq_curr_state: current value of the sequencer register.
		* @ctxid_idx: index for the context ID registers.
		* @ctxid_val: value for the context ID to trigger on.
		* @ctxid_pid: value for the context ID to trigger on.
		* @ctxid_vpid: Virtual PID seen by users if PID namespace is enabled, otherwise
		* the same value of ctxid_pid.
		* @ctxid_mask: mask applicable to all the context IDs.
		* @sync_freq: Synchronisation frequency.
		* @timestamp_event: Defines an event that requests the insertion
		@@ -235,7 +237,8 @@ struct etm_drvdata {
		u32 seq_13_event;
		u32 seq_curr_state;
		u8 ctxid_idx;
		u32 ctxid_val[ETM_MAX_CTXID_CMP];
		u32 ctxid_pid[ETM_MAX_CTXID_CMP];
		u32 ctxid_vpid[ETM_MAX_CTXID_CMP];
		u32 ctxid_mask;
		u32 sync_freq;
		u32 timestamp_event;

drivers/hwtracing/coresight/coresight-etm3x.c

+35 −11

Original line number	Diff line number	Diff line
		@@ -237,8 +237,11 @@ static void etm_set_default(struct etm_drvdata *drvdata)

		drvdata->seq_curr_state = 0x0;
		drvdata->ctxid_idx = 0x0;
		for (i = 0; i < drvdata->nr_ctxid_cmp; i++)
		drvdata->ctxid_val[i] = 0x0;
		for (i = 0; i < drvdata->nr_ctxid_cmp; i++) {
		drvdata->ctxid_pid[i] = 0x0;
		drvdata->ctxid_vpid[i] = 0x0;
		}

		drvdata->ctxid_mask = 0x0;
		}

		@@ -289,7 +292,7 @@ static void etm_enable_hw(void *info)
		for (i = 0; i < drvdata->nr_ext_out; i++)
		etm_writel(drvdata, ETM_DEFAULT_EVENT_VAL, ETMEXTOUTEVRn(i));
		for (i = 0; i < drvdata->nr_ctxid_cmp; i++)
		etm_writel(drvdata, drvdata->ctxid_val[i], ETMCIDCVRn(i));
		etm_writel(drvdata, drvdata->ctxid_pid[i], ETMCIDCVRn(i));
		etm_writel(drvdata, drvdata->ctxid_mask, ETMCIDCMR);
		etm_writel(drvdata, drvdata->sync_freq, ETMSYNCFR);
		/* No external input selected */
		@@ -1386,38 +1389,41 @@ static ssize_t ctxid_idx_store(struct device *dev,
		}
		static DEVICE_ATTR_RW(ctxid_idx);

		static ssize_t ctxid_val_show(struct device *dev,
		static ssize_t ctxid_pid_show(struct device *dev,
		struct device_attribute attr, char buf)
		{
		unsigned long val;
		struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent);

		spin_lock(&drvdata->spinlock);
		val = drvdata->ctxid_val[drvdata->ctxid_idx];
		val = drvdata->ctxid_vpid[drvdata->ctxid_idx];
		spin_unlock(&drvdata->spinlock);

		return sprintf(buf, "%#lx\n", val);
		}

		static ssize_t ctxid_val_store(struct device *dev,
		static ssize_t ctxid_pid_store(struct device *dev,
		struct device_attribute *attr,
		const char *buf, size_t size)
		{
		int ret;
		unsigned long val;
		unsigned long vpid, pid;
		struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent);

		ret = kstrtoul(buf, 16, &val);
		ret = kstrtoul(buf, 16, &vpid);
		if (ret)
		return ret;

		pid = coresight_vpid_to_pid(vpid);

		spin_lock(&drvdata->spinlock);
		drvdata->ctxid_val[drvdata->ctxid_idx] = val;
		drvdata->ctxid_pid[drvdata->ctxid_idx] = pid;
		drvdata->ctxid_vpid[drvdata->ctxid_idx] = vpid;
		spin_unlock(&drvdata->spinlock);

		return size;
		}
		static DEVICE_ATTR_RW(ctxid_val);
		static DEVICE_ATTR_RW(ctxid_pid);

		static ssize_t ctxid_mask_show(struct device *dev,
		struct device_attribute attr, char buf)
		@@ -1539,6 +1545,18 @@ static ssize_t status_show(struct device *dev,
		}
		static DEVICE_ATTR_RO(status);

		static ssize_t cpu_show(struct device *dev,
		struct device_attribute attr, char buf)
		{
		int val;
		struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent);

		val = drvdata->cpu;
		return scnprintf(buf, PAGE_SIZE, "%d\n", val);

		}
		static DEVICE_ATTR_RO(cpu);

		static ssize_t traceid_show(struct device *dev,
		struct device_attribute attr, char buf)
		{
		@@ -1609,12 +1627,13 @@ static struct attribute *coresight_etm_attrs[] = {
		&dev_attr_seq_13_event.attr,
		&dev_attr_seq_curr_state.attr,
		&dev_attr_ctxid_idx.attr,
		&dev_attr_ctxid_val.attr,
		&dev_attr_ctxid_pid.attr,
		&dev_attr_ctxid_mask.attr,
		&dev_attr_sync_freq.attr,
		&dev_attr_timestamp_event.attr,
		&dev_attr_status.attr,
		&dev_attr_traceid.attr,
		&dev_attr_cpu.attr,
		NULL,
		};
		ATTRIBUTE_GROUPS(coresight_etm);
		@@ -1912,6 +1931,11 @@ static struct amba_id etm_ids[] = {
		.mask = 0x0003ffff,
		.data = "PTM 1.1",
		},
		{ /* PTM 1.1 Qualcomm */
		.id = 0x0003006f,
		.mask = 0x0003ffff,
		.data = "PTM 1.1",
		},
		{ 0, 0},
		};

drivers/hwtracing/coresight/coresight-etm4x.c

+40 −20

Original line number	Diff line number	Diff line
		@@ -15,6 +15,7 @@
		#include <linux/init.h>
		#include <linux/types.h>
		#include <linux/device.h>
		#include <linux/module.h>
		#include <linux/io.h>
		#include <linux/err.h>
		#include <linux/fs.h>
		@@ -135,7 +136,9 @@ static void etm4_enable_hw(void *info)
		writel_relaxed(drvdata->cntr_val[i],
		drvdata->base + TRCCNTVRn(i));
		}
		for (i = 0; i < drvdata->nr_resource; i++)

		/* Resource selector pair 0 is always implemented and reserved */
		for (i = 2; i < drvdata->nr_resource * 2; i++)
		writel_relaxed(drvdata->res_ctrl[i],
		drvdata->base + TRCRSCTLRn(i));

		@@ -154,7 +157,7 @@ static void etm4_enable_hw(void *info)
		drvdata->base + TRCACATRn(i));
		}
		for (i = 0; i < drvdata->numcidc; i++)
		writeq_relaxed(drvdata->ctxid_val[i],
		writeq_relaxed(drvdata->ctxid_pid[i],
		drvdata->base + TRCCIDCVRn(i));
		writel_relaxed(drvdata->ctxid_mask0, drvdata->base + TRCCIDCCTLR0);
		writel_relaxed(drvdata->ctxid_mask1, drvdata->base + TRCCIDCCTLR1);
		@@ -488,8 +491,9 @@ static ssize_t reset_store(struct device *dev,
		drvdata->cntr_val[i] = 0x0;
		}

		drvdata->res_idx = 0x0;
		for (i = 0; i < drvdata->nr_resource; i++)
		/* Resource selector pair 0 is always implemented and reserved */
		drvdata->res_idx = 0x2;
		for (i = 2; i < drvdata->nr_resource * 2; i++)
		drvdata->res_ctrl[i] = 0x0;

		for (i = 0; i < drvdata->nr_ss_cmp; i++) {
		@@ -505,8 +509,11 @@ static ssize_t reset_store(struct device *dev,
		}

		drvdata->ctxid_idx = 0x0;
		for (i = 0; i < drvdata->numcidc; i++)
		drvdata->ctxid_val[i] = 0x0;
		for (i = 0; i < drvdata->numcidc; i++) {
		drvdata->ctxid_pid[i] = 0x0;
		drvdata->ctxid_vpid[i] = 0x0;
		}

		drvdata->ctxid_mask0 = 0x0;
		drvdata->ctxid_mask1 = 0x0;

		@@ -1728,7 +1735,7 @@ static ssize_t res_idx_store(struct device *dev,
		if (kstrtoul(buf, 16, &val))
		return -EINVAL;
		/* Resource selector pair 0 is always implemented and reserved */
		if ((val == 0) \|\| (val >= drvdata->nr_resource))
		if (val < 2 \|\| val >= drvdata->nr_resource * 2)
		return -EINVAL;

		/*
		@@ -1814,7 +1821,7 @@ static ssize_t ctxid_idx_store(struct device *dev,
		}
		static DEVICE_ATTR_RW(ctxid_idx);

		static ssize_t ctxid_val_show(struct device *dev,
		static ssize_t ctxid_pid_show(struct device *dev,
		struct device_attribute *attr,
		char *buf)
		{
		@@ -1824,17 +1831,17 @@ static ssize_t ctxid_val_show(struct device *dev,

		spin_lock(&drvdata->spinlock);
		idx = drvdata->ctxid_idx;
		val = (unsigned long)drvdata->ctxid_val[idx];
		val = (unsigned long)drvdata->ctxid_vpid[idx];
		spin_unlock(&drvdata->spinlock);
		return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
		}

		static ssize_t ctxid_val_store(struct device *dev,
		static ssize_t ctxid_pid_store(struct device *dev,
		struct device_attribute *attr,
		const char *buf, size_t size)
		{
		u8 idx;
		unsigned long val;
		unsigned long vpid, pid;
		struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);

		/*
		@@ -1844,16 +1851,19 @@ static ssize_t ctxid_val_store(struct device *dev,
		*/
		if (!drvdata->ctxid_size \|\| !drvdata->numcidc)
		return -EINVAL;
		if (kstrtoul(buf, 16, &val))
		if (kstrtoul(buf, 16, &vpid))
		return -EINVAL;

		pid = coresight_vpid_to_pid(vpid);

		spin_lock(&drvdata->spinlock);
		idx = drvdata->ctxid_idx;
		drvdata->ctxid_val[idx] = (u64)val;
		drvdata->ctxid_pid[idx] = (u64)pid;
		drvdata->ctxid_vpid[idx] = (u64)vpid;
		spin_unlock(&drvdata->spinlock);
		return size;
		}
		static DEVICE_ATTR_RW(ctxid_val);
		static DEVICE_ATTR_RW(ctxid_pid);

		static ssize_t ctxid_masks_show(struct device *dev,
		struct device_attribute *attr,
		@@ -1948,7 +1958,7 @@ static ssize_t ctxid_masks_store(struct device *dev,
		*/
		for (j = 0; j < 8; j++) {
		if (maskbyte & 1)
		drvdata->ctxid_val[i] &= ~(0xFF << (j * 8));
		drvdata->ctxid_pid[i] &= ~(0xFF << (j * 8));
		maskbyte >>= 1;
		}
		/* Select the next ctxid comparator mask value */
		@@ -2192,7 +2202,7 @@ static struct attribute *coresight_etmv4_attrs[] = {
		&dev_attr_res_idx.attr,
		&dev_attr_res_ctrl.attr,
		&dev_attr_ctxid_idx.attr,
		&dev_attr_ctxid_val.attr,
		&dev_attr_ctxid_pid.attr,
		&dev_attr_ctxid_masks.attr,
		&dev_attr_vmid_idx.attr,
		&dev_attr_vmid_val.attr,
		@@ -2409,8 +2419,13 @@ static void etm4_init_arch_data(void *info)
		drvdata->nr_addr_cmp = BMVAL(etmidr4, 0, 3);
		/* NUMPC, bits[15:12] number of PE comparator inputs for tracing */
		drvdata->nr_pe_cmp = BMVAL(etmidr4, 12, 15);
		/* NUMRSPAIR, bits[19:16] the number of resource pairs for tracing */
		drvdata->nr_resource = BMVAL(etmidr4, 16, 19);
		/*
		* NUMRSPAIR, bits[19:16]
		* The number of resource pairs conveyed by the HW starts at 0, i.e a
		* value of 0x0 indicate 1 resource pair, 0x1 indicate two and so on.
		* As such add 1 to the value of NUMRSPAIR for a better representation.
		*/
		drvdata->nr_resource = BMVAL(etmidr4, 16, 19) + 1;
		/*
		* NUMSSCC, bits[23:20] the number of single-shot
		* comparator control for tracing
		@@ -2497,6 +2512,8 @@ static void etm4_init_default_data(struct etmv4_drvdata *drvdata)
		drvdata->cntr_val[i] = 0x0;
		}

		/* Resource selector pair 0 is always implemented and reserved */
		drvdata->res_idx = 0x2;
		for (i = 2; i < drvdata->nr_resource * 2; i++)
		drvdata->res_ctrl[i] = 0x0;

		@@ -2512,8 +2529,11 @@ static void etm4_init_default_data(struct etmv4_drvdata *drvdata)
		drvdata->addr_type[1] = ETM_ADDR_TYPE_RANGE;
		}

		for (i = 0; i < drvdata->numcidc; i++)
		drvdata->ctxid_val[i] = 0x0;
		for (i = 0; i < drvdata->numcidc; i++) {
		drvdata->ctxid_pid[i] = 0x0;
		drvdata->ctxid_vpid[i] = 0x0;
		}

		drvdata->ctxid_mask0 = 0x0;
		drvdata->ctxid_mask1 = 0x0;

drivers/hwtracing/coresight/coresight-etm4x.h

+5 −2

Original line number	Diff line number	Diff line
		@@ -265,7 +265,9 @@
		* @addr_type: Current status of the comparator register.
		* @ctxid_idx: Context ID index selector.
		* @ctxid_size: Size of the context ID field to consider.
		* @ctxid_val: Value of the context ID comparator.
		* @ctxid_pid: Value of the context ID comparator.
		* @ctxid_vpid: Virtual PID seen by users if PID namespace is enabled, otherwise
		* the same value of ctxid_pid.
		* @ctxid_mask0:Context ID comparator mask for comparator 0-3.
		* @ctxid_mask1:Context ID comparator mask for comparator 4-7.
		* @vmid_idx: VM ID index selector.
		@@ -352,7 +354,8 @@ struct etmv4_drvdata {
		u8 addr_type[ETM_MAX_SINGLE_ADDR_CMP];
		u8 ctxid_idx;
		u8 ctxid_size;
		u64 ctxid_val[ETMv4_MAX_CTXID_CMP];
		u64 ctxid_pid[ETMv4_MAX_CTXID_CMP];
		u64 ctxid_vpid[ETMv4_MAX_CTXID_CMP];
		u32 ctxid_mask0;
		u32 ctxid_mask1;
		u8 vmid_idx;