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Commit 773875bf authored by Daniel Vetter's avatar Daniel Vetter
Browse files

drm/i915: Don't set the 8to6 dither flag when not scaling 

Apparently we really only need this when the pfit is enabled, at least
I couldn't dicern any difference here. Furthermore the hacks we have
to reconstruct this bit is a bit glaring, and probably only works
because we can't move the lvds port to any other pipe than pipe B on
gen2/3.

So let's just rip this out.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=77137

 (the LVDS
WARNING log, not the main "VGA can't be turned on" issue).
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 23d0b130

drivers/gpu/drm/i915/intel_lvds.c

+0 −7
Original line number Diff line number Diff line
@@ -111,13 +111,6 @@ static void intel_lvds_get_config(struct intel_encoder *encoder, 


	pipe_config->adjusted_mode.flags |= flags;



	/* gen2/3 store dither state in pfit control, needs to match */

	if (INTEL_INFO(dev)->gen < 4) {

		tmp = I915_READ(PFIT_CONTROL);



		pipe_config->gmch_pfit.control |= tmp & PANEL_8TO6_DITHER_ENABLE;

	}



	dotclock = pipe_config->port_clock;



	if (HAS_PCH_SPLIT(dev_priv->dev))

drivers/gpu/drm/i915/intel_panel.c

+4 −4
Original line number Diff line number Diff line
@@ -308,16 +308,16 @@ void intel_gmch_panel_fitting(struct intel_crtc *intel_crtc, 
		pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) |

				 PFIT_FILTER_FUZZY);



	/* Make sure pre-965 set dither correctly for 18bpp panels. */

	if (INTEL_INFO(dev)->gen < 4 && pipe_config->pipe_bpp == 18)

		pfit_control |= PANEL_8TO6_DITHER_ENABLE;



out:

	if ((pfit_control & PFIT_ENABLE) == 0) {

		pfit_control = 0;

		pfit_pgm_ratios = 0;

	}



	/* Make sure pre-965 set dither correctly for 18bpp panels. */

	if (INTEL_INFO(dev)->gen < 4 && pipe_config->pipe_bpp == 18)

		pfit_control |= PANEL_8TO6_DITHER_ENABLE;



	pipe_config->gmch_pfit.control = pfit_control;

	pipe_config->gmch_pfit.pgm_ratios = pfit_pgm_ratios;

	pipe_config->gmch_pfit.lvds_border_bits = border;