Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 23d0b130 authored by Ben Widawsky's avatar Ben Widawsky Committed by Daniel Vetter
Browse files

drm/i915/bdw: Add 42ms delay for IPS disable



This is a requirement added to the spec. This patch will prevent
persistent corruption on the display.

v2: Make the wait before the vblank wait. (Art)
Try to finish early by polling the register
s/present/prevent (Chris)

Cc: Art Runyan <arthur.j.runyan@intel.com>
Signed-off-by: default avatarBen Widawsky <ben@bwidawsk.net>
[danvet: Upgrade debug output to ERROR.]
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 439d7ac0
Loading
Loading
Loading
Loading
+4 −1
Original line number Diff line number Diff line
@@ -3583,10 +3583,13 @@ void hsw_disable_ips(struct intel_crtc *crtc)
		return;

	assert_plane_enabled(dev_priv, crtc->plane);
	if (IS_BROADWELL(crtc->base.dev)) {
	if (IS_BROADWELL(dev)) {
		mutex_lock(&dev_priv->rps.hw_lock);
		WARN_ON(sandybridge_pcode_write(dev_priv, DISPLAY_IPS_CONTROL, 0));
		mutex_unlock(&dev_priv->rps.hw_lock);
		/* wait for pcode to finish disabling IPS, which may take up to 42ms */
		if (wait_for((I915_READ(IPS_CTL) & IPS_ENABLE) == 0, 42))
			DRM_ERROR("Timed out waiting for IPS disable\n");
	} else {
		I915_WRITE(IPS_CTL, 0);
		POSTING_READ(IPS_CTL);